82434LX Datasheet, PDF (26/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
Signal
PLOCK
REQ
GNT
MEMCS
FLSHREQ
MEMREQ
MEMACK
PAR
Type
Description
sts
PCI LOCK PLOCK is used to indicate an atomic operation that may require
multiple transactions to complete PCI provides a mechanism referred to as
‘‘resource lock’’ in which only the target of the PCI transaction is locked The
assertion of GNT on PCI does not guarantee control of the PLOCK signal
Control of PLOCK is obtained under its own protocol When the PCMC is the PCI
slave PLOCK is sampled as an input on the rising edge of PCLKIN when FRAME
is sampled active If PLOCK is sampled asserted the PCMC enters into a locked
state and remains in the locked state until PLOCK is sampled negated on a
following rising edge of PCLKIN when FRAME is sampled asserted
out REQUEST The PCMC asserts REQ to indicate to the PCI bus arbiter that the
PCMC is requesting use of the PCI Bus in response to a CPU cycle directed to PCI
in GRANT When asserted GNT indicates that access to the PCI Bus has been
granted to the PCMC by the PCI Bus arbiter
in MAIN MEMORY CHIP SELECT When asserted MEMCS indicates to the PCMC
that a PCI master cycle is targeting main memory MEMCS is generated by the
expansion bus bridge MEMCS is sampled by the PCMC on the rising edge of
PCLKIN on the first and second cycle after FRAME has been asserted
in FLUSH REQUEST When asserted FLSHREQ instructs the PCMC to flush the
CPU-to-PCI posted write buffer in the LBXs and to disable further posting to this
buffer as long as FLSHREQ remains active The PCMC acknowledges completion
of the CPU-to-PCI write buffer flush operation by asserting MEMACK MEMACK
remains asserted until FLSHREQ is negated FLSHREQ is driven by the
expansion bus bridge and is used to avoid deadlock conditions on the PCI Bus
in MEMORY REQUEST When asserted MEMREQ instructs the PCMC to flush the
CPU-to-PCI and CPU-to-main memory posted write buffers and to disable posting in
these buffers as long as MEMREQ is active The PCMC acknowledges completion
of the flush operations by asserting MEMACK MEMACK remains asserted until
MEMREQ is negated MEMREQ is driven by the expansion bus bridge
out MEMORY ACKNOWLEDGE When asserted MEMACK indicates the completion
of the operations requested by an active FLSHREQ and or MEMREQ
t s PARITY PAR is an even parity bit across the AD 31 0 and C BE 3 0 lines Parity
is generated on all PCI transactions As a master the PCMC generates even parity
on CPU writes to PCI based on the PPOUT 1 0 inputs from the LBXs During CPU
read cycles from PCI the PCMC checks parity by checking the value sampled on the
PAR input with the PPOUT 1 0 inputs from the LBXs As a slave the PCMC
generates even parity on PAR based on the PPOUT 1 0 inputs during PCI master
reads from main memory During PCI master writes to main memory the PCMC
checks parity by checking the value sampled on PAR with the PPOUT 1 0 inputs
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