82434LX Datasheet, PDF (140/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
During system initialization the CPU typically at-
tempts to read from the configuration space of all 15
possible PCI devices to detect the presence of the
devices If no device is present DEVSEL is not be
asserted and the cycle is terminated returning
FF
FFh to the CPU Figure 69 depicts an
attempted read from a configuration register of a
non-existent device If no device responds then the
PCMC aborts the cycle and sends the DRVFF com-
mand over the HIG 4 0 lines causing the LBXs to
drive FF FFh onto the host data lines
290479 – 79
Figure 69 CPU Attempted Configuration Read from Non-Existent PCI Device
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