82434LX Datasheet, PDF (5/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

CONTENTS
3 2 4 PCICMD PCI COMMAND REGISTER
3 2 5 PCISTS PCI STATUS REGISTER
3 2 6 RID REVISION IDENTIFICATION REGISTER
3 2 7 RLPI REGISTER-LEVEL PROGRAMMING INTERFACE REGISTER
3 2 8 SUBC SUB-CLASS CODE REGISTER
3 2 9 BASEC BASE CLASS CODE REGISTER
3 2 10 MLT MASTER LATENCY TIMER REGISTER
3 2 11 BIST BIST REGISTER
3 2 12 HCS HOST CPU SELECTION REGISTER
3 2 13 DFC DETURBO FREQUENCY CONTROL REGISTER
3 2 14 SCC SECONDARY CACHE CONTROL REGISTER
3 2 15 HBC HOST READ WRITE BUFFER CONTROL
3 2 16 PBC PCI READ WRITE BUFFER CONTROL REGISTER
3 2 17 DRAMC DRAM CONTROL REGISTER
3 2 18 DRAMT DRAM TIMING REGISTER
3 2 19 PAM PROGRAMMABLE ATTRIBUTE MAP REGISTERS (PAM 6 0 )
3 2 20 DRB DRAM ROW BOUNDARY REGISTERS
3 2 20 1 82434LX Description
3 2 20 2 82434NX Description
3 2 21 DRBE DRAM ROW BOUNDARY EXTENSION REGISTER
3 2 22 ERRCMD ERROR COMMAND REGISTER
3 2 23 ERRSTS ERROR STATUS REGISTER
3 2 24 SMRS SMRAM SPACE REGISTER
3 2 25 MSG MEMORY SPACE GAP REGISTER
3 2 26 FBR FRAME BUFFER RANGE REGISTER
4 0 PCMC ADDRESS MAP
4 1 CPU Memory Address Map
4 2 System Management RAM
4 3 PC Compatibility Range
4 4 I O Address Map
SMRAM
PAGE
41
42
43
43
43
44
44
44
45
46
46
48
49
50
51
51
54
54
56
58
58
60
61
61
62
64
64
64
65
66
5