82434LX Datasheet, PDF (32/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
Bit
Description
31 CONFIGURATION ENABLE (CONE) R W When CONE^e1 accesses to PCI configuration
space are enabled if the PCAMS bit of the PMC register is also 1 When CONE^e0 accesses to PCI
configuration space are disabled if the PCAMS bit is 1 If the PCAMS bit is 0 this bit has no effect
30 24 RESERVED
23 16
BUS NUMBER (BUSNUM) R W When the BUSNUM is programmed to 00h the target of the
Configuration Cycle is either the PCMC or the PCI Local Bus that is directly connected to the PCMC
PCI Access Mechanism 1 can generate either type 0 or type 1 configuration cycles on PCI A type
0 Configuration Cycle is generated on PCI if the Bus Number is programmed to 00h and the PCMC
is not the target If the Bus Number is non-zero a type 1 configuration cycle is generated on PCI with
the Bus Number mapped to AD 23 16 during the address phase
15 11
DEVICE NUMBER (DEVNUM) R W This field selects one agent on the PCI Bus selected by the
Bus Number During a Type 1 Configuration cycle this field is mapped to AD 15 11 During a Type 0
Configuration Cycle this field is decoded and one of AD 31 17 is driven to a 1 The PCMC is always
Device Number 0
10 8 FUNCTION NUMBER (FUNCNUM) R W This field is mapped to AD 10 8 during PCI
configuration cycles This allows the configuration registers of a particular function in a multi-
function device to be accessed
7 2 REGISTER NUMBER (REGNUM) R W This field selects one register within a particular Bus
Device and Function as specified by the other fields in the Configuration Address Register
REGNUM is mapped to AD 7 2 during PCI configuration cycles
1 0 RESERVED
3 1 2 CSE CONFIGURATION SPACE ENABLE REGISTER
I O Address
Default Value
Attribute
Size
0CF8h
00h
Read Write
8 bits
The CSE Register enables disables configuration space access and provides access to specific functions
within a PCI agent The register is located in the CPU I O address space The PCMC as a Host PCI Bridge
supports multi-function devices on the PCI Bus The function number permits individual configuration spaces
for up to eight functions within an agent The register is located in the CPU I O address space
Bit
Description
7 4 KEY FIELD (KEY) R W This field is used only when the PCI Mechanism Control Register (PMC)
indicates Configuration Access Mechanism 2 is to be used When the key field is programmed to 0h
the PCI configuration space is disabled When the key field is programmed to a non-zero value all
CPU accesses to CnXXh (where n is a non zero value) are forwarded to PCI as configuration space
accesses Additionally when the key field is programmed to a non-zero value all CPU accesses to
C0XXh are intercepted by the PCMC and directed to a PCMC internal register
3 1 FUNCTION NUMBER (FN) R W For multi-function devices this field selects a particular function
within a PCI device During a configuration cycle bits 3 1 become part of the PCI Bus address and
correspond to AD 10 8
0 RESERVED
32