82434LX Datasheet, PDF (37/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
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Figure 4 Mechanism 1 Type 0 Configuration Address to PCI Address Mapping
Type 1 Access
If the BUSNUM field of the CONFADD Register is non-zero a Type 1 configuration cycle is performed on the
PCI Bus CONFADD 23 2 are mapped directly to AD 23 2 (Figure 5) AD 1 0 are driven to 01 to indicate a
Type 1 Configuration cycle All other lines are driven to 0
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Figure 5 Mechanism 1 Type 1 Configuration Address to PCI Address Mapping
3 2 1 2 Access Mechanism 2
The 82434LX 82434NX PCMC uses the CSE and Forward Registers for configuration access mechanism 2
When PCI configuration space is enabled via the CSE Register the PCMC maps PCI configuration space into
4-KBytes of CPU I O space Each PCI device has its own 256-Byte configuration space When configuration
space is enabled CPU accesses to I O locations CXXXh are translated into configuration space accesses In
this mode the PCMC translates all I O cycles in the C100h – CFFFh range into configuration cycles on the PCI
Bus I O accesses within the C000h–C0FFh range are intercepted by the PCMC and are directed to the
PCMC internal configuration registers These cycles are not forwarded to the PCI Bus
When configuration space access is disabled CPU accesses to I O locations CXXXh are forwarded to the PCI
Bus I O space CPU cycles to I O locations other than CXXXh are unaffected by whether the configuration
mode is enabled or disabled These cycles are always treated as ordinary I O cycles by the PCMC
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