MC68LC040RC25A Datasheet, PDF (417/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
C.7.5 Clock AC Timing Specifications (See Figure C-12)
PRELIMINARY
0 - 16.67 MHz
25 MHz
33 MHz
Num
Characteristic
Min Max Min Max Min Max Unit
Frequency of Operation
0 16.67 16.67 25 16.67 33 MHz
5
6,7 ¹
BCLK Cycle Time
BCLK Rise and Fall Time
60
—
40
60
30
60
ns
—
2
—
2
—
2
ns
8
BCLK Duty Cycle Measured at 1.5 V
45
55
45
55
45
55
%
8a2 BCLK Pulse Width High Measured at 1.5 V 28.5
—
18
22 13.63 16.66 ns
8b2 BCLK Pulse Width Low Measured at 1.5 V 28.5
—
18
22 13.63 16.66 ns
9
BCLK edge to edge jitter
—
—
—
20
—
20
ps
NOTES:
1. Rising and falling edges of BCLK must be monotonic.
2. Specification value at maximum frequency of operation. BCLK must not exceed 16.67 MHz for low
frequency operation
BCLK
VM
8A
8B
5
6
7
VIH
VIL
Figure C-12. Clock Input Timing Diagram
MOTOROLA
M68040 USER’S MANUAL
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C- 21