MC68LC040RC25A Datasheet, PDF (369/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
MC68LC040 REV2.3 (01/29/2000)
A.6.5 Clock AC Timing Specifications (see Figure A-4)
Num
1
2
3
4
4a*
4b*
5
6, 7
8
8a*
8b*
9
10
Characteristic
Frequency of Operation
PCLK Cycle Time
PCLK Rise Time
PCLK Fall Time
PCLK Duty Cycle Measured at
1.5 V
PCLK Pulse Width High
Measured at 1.5 V
PCLK Pulse Width Low
Measured at 1.5 V
BCLK Cycle Time
BCLK Rise and Fall Time
BCLK Duty Cycle Measured at
1.5 V
BCLK Pulse Width High
Measured at 1.5 V
BCLK Pulse Width Low
Measured at 1.5 V
PCLK, BCLK Frequency Stability
PCLK to BCLK Skew
20 MHz
Min Max
16.67 20
25
30
—
1.7
—
1.6
48
52
12
13
12
13
50
60
—
4
40
60
20
30
20
30
— 1000
—
9
25 MHz
Min Max
16.67 25
20
30
—
1.7
—
1.6
47.5 52.5
9.5 10.5
9.5 10.5
40
60
—
4
40
60
16
24
16
24
— 1000
—
9
33 MHz
Min Max
16.67 33
15
30
—
1.7
—
1.6
46.67 53.33
7
8
7
8
30
60
—
3
40
60
12
18
12
18
— 1000
— N/A
40 MHz
Min Max
20
40
12.5 25
—
1.5
—
1.5
46.00 54.00
5.75 6.75
5.75 6.75
25
50
—
3
40
60
10
15
10
15
— 1000
— N/A
Unit
MHz
nS
nS
nS
%
nS
nS
nS
nS
%
nS
nS
ppm
nS
*Specification value at maximum frequency of operation.
PCLK
10
BCLK
1
4A
4B
V_M
2
3
V_IH
V_IL
10
6
7
V_M
V_IH
V_IL
8A
8B
5
Figure A-4. Clock Input Timing Diagram
MOTOROLA
M68040 USER’S MANUAL
A-9
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