MC68LC040RC25A Datasheet, PDF (147/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
UPPER UPPER DATA SELECT
D31–D24
UPPER MIDDLE DATA SELECT
D23–D16
LOWER MIDDLE DATA SELECT
D15–D8
LOWER LOWER DATA SELECT
D7–D0
A0
A1
SIZ0
SIZ1
PAL16L8
U1
MC68040 Byte Data Select Generation.
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A0 A1 SIZ0 SIZ1 NC NC NC NC NC GND NC UUD UMD LMD LLD
NC NC NC NC VCC
/UUD = /A0 * /A1
+ /SIZ1 * /SIZ0
+ SIZ1 * SIZ0
/UMD = A0 * /A1
+ /A1 * /SIZ1
+ SIZ1 * SIZ0
+ /SIZ1 * /SIZ0
/LMD = /A0 * /A1
+ /SIZ1 * /SIZ0
+ SIZ1 * SIZ0
/LLD = A0 * /A1
+ /A1 * /SIZ1
+ SIZ1 * SIZ0
+ /SIZ1 * /SIZ0
; directly addressed, any size
; enable every byte for long word size
; enable every byte for line size
; directly addressed, any size
; word aligned, size is word or line
; enable every byte for long word size
; enable every byte for line size
; directly addressed, any size
; enable every byte for long word size
; enable every byte for line size
; directly addressed, any size
; word aligned, word or line size
; enable every byte for long word size
; enable every byte for line size
Figure 7-4. Byte Enable Signal Generation and PAL Equation
A brief summary of the bus signal encodings for each access type is listed in Table 7-2.
Additional information on the encodings for the M68040 signals can be found in Section 5
Signal Description.
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M68040 USER’S MANUAL
7-5
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