MC68LC040RC25A Datasheet, PDF (177/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
7.5.2 Breakpoint Interrupt Acknowledge Bus Cycle
The execution of a breakpoint instruction (BKPT) generates the breakpoint interrupt
acknowledge bus cycle. An acknowledged access is indicated with TT1 and TT0 = $3,
address A31–A0 = $00000000, and TM2–TM0 = $0. When the external device terminates
the cycle with either TA or TEA, the processor takes an illegal instruction exception.
Figures 7-24 and 7-25 illustrate a flowchart and functional timing diagram for a breakpoint
interrupt acknowledge transfer.
PROCESSOR
BREAKPOINT ACKNOWLEDGE
1) SET R/W TO READ
2) DRIVE A31–A0 TO $00000000
3) DRIVE UPA1, UPA0 TO $0
4) SET SIZE TO BYTE
5) SET TRANSFER TYPE ON TT1, TT0 TO $3
6) SET TRANSFER MODIFIER TM2–TM0 TO $0
8) NEGATE CIOUT
9) ASSERT TS FOR ONE CLOCK
10) ASSERT TIP
INITIATE ILLEGAL
INSTRUCTION EXCEPTION PROCESSING
EXTERNAL DEVICE
ASSERT TA OR TEA
TERMINATE CYCLE
1) NEGATE TA OR TEA
Figure 7-24. Breakpoint Interrupt Acknowledge Bus Cycle Flowchart
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M68040 USER’S MANUAL
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