MC68LC040RC25A Datasheet, PDF (200/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
R* Λ RV Λ A* Λ AV
AM_BG*,
040_BG
R Λ RV Λ LOCK Λ
LOCKE V R Λ RV Λ
LOCK*
040_BG*,
AM_BG*
LOCKE
V LOCK*
S1
040_BG*,
AM_BG
S4
040_BG*,
AM_BG*
R* Λ RV Λ A Λ AV
V RV* V RA*
R* V RV* V
R Λ RV Λ LOCK Λ
LOCKE*
LOCK Λ LOCKE*
S3
S2
R* Λ RV Λ A* Λ
AV V A Λ AV
040_BG*,
040_BG*,
AM_BG
AM_BG*
R Λ RV
S5
040_BG*,
AM_BG
R Λ RV Λ A* Λ
AV V AV* V RV*
R Λ RV Λ A* Λ AV
R* Λ RV
S6
040_BG*,
AM_BG
RV* V RA* V
R Λ RV Λ A Λ AV
(a) MC68040 Low-Priorty, Default Bus Master
R* Λ RV Λ A* Λ AV
V R Λ RV Λ 040_BR
R* Λ RV Λ A Λ AV
V RV* V RA*
AM_BG*, ^{R Λ RV Λ 040_BR}
040_BG
R* V RV* V 040_BR
040_BR
040_BG*, ^040_BR
AM_BG*
S1
040_BG*,
AM_BG
S4
040_BG*,
AM_BG*
S3
S2
R* Λ RV Λ A* Λ AV
040_BG*, ^{V A Λ AV} 040_BG*,
AM_BG
AM_BG*
R Λ RV Λ 040_BR
S5
040_BG*,
AM_BG
R* Λ RV Λ A* Λ AV
V AV* V RV*
R Λ RV Λ A* Λ AV
R* Λ RV
040_BG*, ^S6
AM_BG
RV* V RA* V
R Λ RV Λ A Λ AV
NOTES:
1. It is assumed that the asynchronous device takes the bus only after TIP or the MC68040's BB is negated.
2. *Indicates the signal is asserted for that device.
(b) MC68040 High-Priorty, Default Bus Master
Figure 7-39. M68040 Asynchronous DMA Arbitration
7-58
M68040 USER’S MANUAL
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