MC68LC040RC25A Datasheet, PDF (306/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
10.6 INTEGER UNIT INSTRUCTION TIMINGS (Continued)
BCHG, BCLR, BSETa
BFCHG, BFCLR, BFSETb,c
BFEXTS, BFEXTUb,d
Addressing
Mode
Dn
<ea>
Calculate
1
Execute
3/4
<ea>
Calculate
3/4 ^e
Execute
6/7 ^e
<ea>
Calculate
1/2 ^e
Execute
4/5 ^e
An
—
—
—
—
—
—
(An)
(An)+
1
3/4
9
2L + 8
9
2L + 7
1
3/4
—
—
—
—
–(An)
1
3/4
—
—
—
—
(d _16,An)
2/1
1L + 3/4
9
2L + 8
9
2L + 7
(d _16,PC)
—
—
—
—
10
3L + 7
(xxx).W, (xxx).L
2/1
1L + 3/4
9
2L + 8
9
2L + 7
#<xxx>
—
—
—
—
—
—
(d _8,An,Xn)
3
5/6
10
11
10
10
(d _8,PC,Xn)
—
—
—
—
11
1L + 10
(BR,Xn)
7
1L + 8/1 _L + 9
13
1L + 13
13
1L + 12
(bd,BR,Xn)
8
1L + 9/1 _L + 10
14
1L + 14
14
1L + 13
([bd,BR,Xn])
10
1L + 11/1 _L + 12
16
1L + 16
16
1L + 15
([bd,BR,Xn],od)
11
1L + 12/1 _L + 13
17
1L + 17
17
1L + 16
([bd,BR],Xn)
11
3L + 10/3 _L + 11
17
3L + 15
17
3L + 14
([bd,BR],Xn,od)
12
3L + 11/3 _L + 12
18
3L + 16
18
3L + 15
NOTES:
a. Bit instruction <ea> calculate and execute times T1/T2 apply to #<xxx>/Dn bit numbers.
b. This instruction interlocks the <ea> calculate and execute stages.
c. If the bit field spans a long-word boundary, add ten and nine clocks to the <ea> calculate and execute times,
respectively. Two memory addresses are accessed in this case.
d. If the bit field spans a long-word boundary, add two clocks to the execute time. Two memory addresses are
accessed in this case.
e. Immediate count specified for both width and offset and width and/or offset specified in register, respectively.
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