MC68LC040RC25A Datasheet, PDF (378/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
MC68EC040 REV2.3 (01/31/2000)
INSTRUCTION DATA BUS
INSTRUCTION
FETCH
DECODE
EFFECTIVE
ADDRESS
CALCULATE
EFFECTIVE
ADDRESS
FETCH
EXECUTE
WRITE-BACK
INTEGER UNIT
INSTRUCTION
ATC
INSTRUCTION
CACHE
INSTRUCTION
INSTRUCTION
ADDRESS
CACHE/ACCESS/SNOOP
CONTROLLER
B
INSTRUCTION MEMORY MANAGEMENT UNIT
U
S
DATA MEMORY MANAGEMENT UNIT
DATA
CACHE/ACCESS/SNOOP
CONTROLLER
C
O
N
T
R
O
L
L
E
DATA
R
ADDRESS
ADDRESS
BUS
DATA
BUS
BUS
CONTROL
SIGNALS
DATA
ATC
DATA
CACHE
OPERAND DATA BUS
Figure B-1. MC68EC040 Block Diagram
With the exception of the memory management unit (MMU), the floating-point unit (FPU),
and their respective registers, the MC68EC040 programming model, data formats and
types, instruction set (except all instructions beginning with an “F”, PTEST, and PFLUSH),
and caches are the same as described in Section 1 Introduction for the MC68040. Figures
B-2 and B-3 illustrate the programming model and functional signal groups for the
MC68EC040.
B.1 MC68EC040 DIFFERENCES
The following differences exist between the MC68EC040 and MC68040:
• Two independent access control units (ACUs) replace the MC68040 MMUs. The ACU
has four corresponding registers (access control registers) that the MC68040 imple-
ments as data transparent translation registers. The page size is fixed at 4 Kbytes.
B-2
M68040 USER’S MANUAL
MOTOROLA
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