MC68LC040RC25A Datasheet, PDF (399/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
ADDRESS
BUS
DATA BUS
TRANSFER
ATTRIBUTES
MASTER
TRANSFER
CONTROL
SLAVE
TRANSFER
CONTROL
A31–A0
D31–D0
TT0
TT1
TM0
TM1
TM2
TLN0
TLN1
UPA0
UPA1
R/W
SIZ0
SIZ1
LOCK
LOCKE
CIOUT
TS
TIP
TA
TEA
TCI
TBI
MC68040V
MC68EC040V
SC0
SC1
MI
BR
BG
BB
CDIS
MDIS*
RSTI
RSTO
IPL0
IPL1
IPL2
IPEND
AVEC
PST0
PST1
PST2
PST3
BCLK
SCD
LOC
LFO
TCK
TMS
TDI
TDO
JS0
JS2
V_CC
GND
BUS SNOOP CONTROL
AND RESPONSE
BUS ARBITRATION
PROCESSOR
CONTROL
INTERRUPT
CONTROL
STATUS AND
CLOCKS
TEST
POWER SUPPLY
NOTE: *This signal is JS1 on the MC68EC040V.
Figure C-1. MC68040V and MC68EC040V Functional Signal Groups
C.2 LOW-POWER STOP MODE
The low-power stop mode is a reduced power mode of operation, that causes the
MC68040V and MC68EC040V to remain quiescent until either a reset or non-masked
interrupt occurs. This mode of operation has four phases of operation and is triggered by
the low-power stop (LPSTOP) instruction:
1. Perform a LPSTOP broadcast cycle.
2. End integer unit (IU) instruction pipeline sequencing, which is similar to the STOP
instruction sequence (IMM data ˘ SR), at termination of the LPSTOP broadcast
cycle.
MOTOROLA
M68040 USER’S MANUAL
C- 3
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