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MC68LC040RC25A Datasheet, PDF (313/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual
Freescale Semiconductor, Inc.
10.6 INTEGER UNIT INSTRUCTION TIMINGS (Continued)
MOVE to CCR
MOVE from SRa
MOVE to SRb
Addressing
Mode
<ea>
Calculate
Execute
<ea>
Calculate
Execute
<ea>
Calculate
Execute
Dn
1
2
2
1L + 2
9
1L + 8
An
—
—
—
—
—
—
(An)
1
(An)+
1
–(An)
1
(d 16,An)
1
(d 16,PC)
3
(xxx).W, (xxx).L
1
#<xxx>
1
(d 8,An,Xn)
3
2
2
1L + 2
10
2L + 8
2
2
1L + 2
10
2L + 8
2
2
1L + 2
10
2L + 8
2
2
1L + 2
10
2L + 8
2L + 2
—
—
11
3L + 8
2
2
1L + 2
10
2L + 8
2
—
—
9
1L + 8
4
4
5
11
11
(d 8,PC,Xn)
4
1L + 4
—
—
12
(BR,Xn)
6
1L + 6
6
1L + 6
—
(bd,BR,Xn)
7
1L + 7
7
1L + 7
14
([bd,BR,Xn])
10
1L + 10
10
1L + 10
17
([bd,BR,Xn],od)
11
1L + 11
11
1L + 11
18
([bd,BR],Xn)
11
3L + 9
11
3L + 9
18
([bd,BR],Xn,od)
12
3L + 10
12
3L + 10
19
NOTES:
a. This instruction interlocks the <ea> calculate and execute stages.
b. Times listed are minimum. This instruction interlocks the <ea> calculate and execute
stages and synchronizes some portions of the processor before execution.
1L + 11
—
1L + 13
1L + 16
1L + 17
3L + 15
3L + 16
10-22
M68040 USER’S MANUAL
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