MC68LC040RC25A Datasheet, PDF (231/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
ENTRY
S1
M0
T1, T0 0
I2:I0 $7
VBR $0
CACR $0
DTTn[E-bit] 0
ITTn[E-bit] 0
FETCH VECTOR #0
OTHERWISE
VECTOR #0 ± SP
FETCH VECTOR #1
BUS ERROR
(DOUBLE BUS FAULT)
OTHERWISE
VECTOR #1 ± PC
PREFETCH 4
LONG WORDS
BUS ERROR
(DOUBLE BUS FAULT)
OTHERWISE
BEGIN INSTRUCTION
EXECUTION
BUS ERROR OR
ADDRESS ERROR
(DOUBLE BUS FAULT)
HALTED STATE
(PST3–PST0 = $5)
EXIT
EXIT
Figure 8-5. Reset Exception Processing Flowchart
After the initial instruction is prefetched, program execution begins at the address in the
PC. The reset exception does not flush the ATCs or invalidate entries in the instruction or
data caches; it does not save the value of either the PC or the SR. If an access fault or
address error occurs during the exception processing sequence for a reset, a double bus
fault is generated. The processor halts, and the processor status (PST3–PST0) signals
indicate $5. Execution of the reset instruction does not cause a reset exception, or affect
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M68040 USER’S MANUAL
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