MC68LC040RC25A Datasheet, PDF (308/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
10.6 INTEGER UNIT INSTRUCTION TIMINGS (Continued)
BTST
CAS ^b
CHKc,d (<ea>, Dn)
Addressing
Mode
Dn
<ea>
Calculate
1
Execute
1/2 ^a
<ea>
Calculate
—
Execute
—
<ea>
Calculate
8
Execute
1L + 7
An
—
—
—
—
—
—
(An)
1
1/2
36
6L + 31
9
(An)+
1
1/2
37
5L + 31
9
–(An)
1
1/2
37
5L + 31
9
(d _16,An)
2/1
1L + 1/2
37
5L + 31
9
(d _16,PC)
3
2L + 1/2 _L + 2
—
—
10
(xxx).W, (xxx).L
2/1
1L + 1/2
36
5L + 31
9
#<xxx>
—
—
—
—
8
(d _8,An,Xn)
3
3/4
36
36
10
2L + 7
2L + 7
2L + 7
2L + 7
3L + 7
2L + 7
1L + 7
10
(d _8,PC,Xn)
5
1L + 4/1 _L + 5
—
—
11
1L + 10
(BR,Xn)
7/6
1L + 6/1 _L + 7
36
1L + 35
12
1L + 11
(bd,BR,Xn)
8/7
1L + 7/1 _L + 8
37
1L + 36
13
1L + 12
([bd,BR,Xn])
10/9
1L + 9/1 _L + 10
42
40
16
1L + 15
([bd,BR,Xn],od)
11/10
1L + 10/1 _L + 11
42
1L + 41
17
1L + 16
([bd,BR],Xn)
11/10
3L + 8/3 _L + 9
42
3L + 38
17
3L + 14
([bd,BR],Xn,od)
12/11
3L + 9/3 _L + 10
42
3L + 39
18
3L + 15
NOTES:
a. Bit instruction <ea> calculate and execute times T1/T2 apply to #<xxx>/Dn bit numbers.
b. Times listed are typical. This instruction interlocks the <ea> calculate and execute stages and synchronizes
some portions of the processor before execution.
c. This instruction interlocks the <ea> calculate and execute stages.
d. Times listed are for Dn within bounds. This instruction interlocks the <ea> calculate and execute stages.
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10-17