MC68LC040RC25A Datasheet, PDF (385/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
MC68EC040 REV2.3 (01/31/2000)
RSTO are reset at the completion of the RESET instruction. An RSTI signal that is asserted
to the processor during execution of a RESET instruction immediately resets the processor
and causes RSTO to negate. RTSO can be logically ANDed with the external signal driving
RTSI to derive a system reset signal that is asserted for both an external processor reset
and execution of a RESET instruction.
B.5 EXCEPTION PROCESSING
The MC68EC040 provides five different stack frames for exception processing and allows
for a MC68040-specific stack frame. Refer to Section 8 Exception Processing for details
on exception processing.
B.5.1 Unimplemented Floating-Point Instructions and Exceptions
All legal MC68040 and MC68881/MC68882 floating-point instructions are defined as unim-
plemented floating-point instructions on the MC68EC040. These instructions generate an
eight-word stack frame (format $4) during exception processing before taking an F-line
exception. These instructions trap as an F-line exception and can be emulated in software
by the F-line exception handler to maintain user-object-code compatibility.
The MC68EC040 assists the emulation process by distinguishing unimplemented float-
ing-point instructions from other unimplemented F-line instructions. To aid emulation, the
effective address is calculated and saved in the format $4 stack frame. This simplifies and
speeds up the emulation process by eliminating the need for the emulation routine to deter-
mine the effective address and by providing information required to emulate the instruction
on the exception stack frame in the supervisor address space. However, the floating-point
instruction can reside in user space; therefore, the floating-point unimplemented exception
handler may need to access user instruction space. The following processing steps occur
for an unimplemented floating-point instruction:
1. When an unimplemented floating-point instruction is encountered, the instruction is
partially decoded, and the effective address is calculated, if required.
2. The processor waits for all previous integer instructions, write-backs, and associated
exception processing to complete before beginning exception processing for the un-
implemented floating-point instruction. Any access error that occurs in completing the
write-backs causes an access error exception, and the resulting stack frame indicates
a pending unimplemented floating-point instruction exception. The access error ex-
ception handler then completes the write-backs in software, and exception processing
for the unimplemented floating-point instruction exception begins immediately after re-
turn from the access error handler.
3. The processor begins exception processing for the unimplemented floating-point in-
struction by making an internal copy of the current SR. The processor then enters the
supervisor mode and clears the trace bits (T1 and T0). It creates a format $4 stack
frame and saves the internal copy of the SR, PC, vector offset, calculated effective ad-
dress, and PC value of the faulted instruction in the stack frame.
The effective address field of the format $4 stack frame contains the calculated effec-
tive address of the operand for the faulted floating-point instruction using the address-
ing mode in which the effective address is calculated. For immediate and register
MOTOROLA
M68040 USER’S MANUAL
B-9
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