MC68LC040RC25A Datasheet, PDF (364/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
MC68LC040 REV2.3 (01/29/2000)
ADDRESS
BUS
DATA
BUS
TRANSFER
ATTRIBUTES
MASTER
TRANSFER
CONTROL
SLAVE
TRANSFER
CONTROL
A31–A0
D31–D0
TT0
TT1
TM0
TM1
TM2
TLN0
TLN1
UPA0
UPA1
R/W
SIZ0
SIZ1
LOCK
LOCKE
CIOUT
TS
TIP
TA
TEA
TCI
TBI
MC68LC040
SC0
SC1
MI
BR
BG
BB
CDIS
RSTI
RSTO
MDIS
PL0
PL1
PL2
IPEND
AVEC
PST0
PST1
PST2
PST3
BCLK
PCLK
JS0
TCK
TMS
TDI
TDO
TRST
V_CC
GND
BUS SNOOP CONTROL
AND RESPONSE
BUS ARBITRATION
PROCESSOR
CONTROL
INTERRUPT
CONTROL
STATUS AND
CLOCKS
TEST
POWER SUPPLY
Figure A-3. MC68LC040 Functional Signal Groups
A.1 MC68LC040 DIFFERENCES
The following differences exist between the MC68LC040 and MC68040:
• The MC68LC040 does not implement the small output bufferr impedance selection
mode.
• The DLE pin name has been changed to JS0
• The MC68LC040 does not implement the data latch (DLE) or multiplexed bus modes
of operation. All timing and drive capabilities of the MC68LC040 are equivalent to those
of the MC68040 in small output buffer impedance mode.
• The MC68LC040 does not contain an FPU, which causes unimplemented floating-point
exceptions to occur using a new eight-word stack frame format.
A-4
M68040 USER’S MANUAL
MOTOROLA
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