MC68LC040RC25A Datasheet, PDF (38/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
Table 1-4. Instruction Set Summary (Continued)
Opcode
FNEG ²
–(Source) ø FPn
Operation
FNOP ²
FRESTORE ²
FSAVE ²
FScc ²
FSGLDIV
None
If in supervisor state
then FPU State Frame ø Internal State
else TRAP
If in supervisor state
then FPU Internal State ø State Frame
else TRAP
If condition true
then 1s ø Destination
else 0s ø Destination
FPn ÷ Source ø FPn
FSGLMUL
FSQRT2
Source × FPn ø FPn
Square Root of Source ø FPn
FSUB2
FPn – Source ø FPn
FTRAPcc2
FTST2
If condition true
then TRAP
Condition Codes for Operand ø FPCC
ILLEGAL
JMP
JSR
LEA
LINK
SSP – 2 ø SSP; Vector Offset ø (SSP);
SSP – 4 ø SSP; PC ø (SSP);
SSp – 2 ø SSP; SR ø (SSP);
Illegal Instruction Vector Address ø PC
Destination Address ø PC
SP – 4 ø SP; PC ø (SP)
Destination Address ø PC
<ea> ø An
SP – 4 ø SP; An ø(SP)
SP ø An, SP+d øSP
Syntax
FNEG.<fmt> <ea>,FPn
FNEG.X FPm,FPn
FNEG.X FPn
FrNEG.<fmt> <ea>,FPn3
FrNEG.X FPm,FPn3
FrNEG.X FPn3
FNOP
FRESTORE <ea>
FSAVE <ea>
FScc.SIZE <ea>
FSGLDIV.<fmt> <ea>,FPn
FSGLDIV.X FPm,FPn
FSGMUL.<fmt> <ea>,FPn
FSGLMUL.X FPm, FPn
FSQRT.<fmt> <ea>,FPn
FSQRT.X FPm,FPn
FSQRT.X FPn
FrSQRT.<fmt> <ea>,FPn3
FrSQRT FPm,FPn3
FrSQRT FPn3
FSUB.<fmt> <ea>,FPn
FSUB.X FPm,FPn
FrSUB.<fmt> <ea>,FPn3
FrSUB.X FPm,FPn3
FTRAPcc
FTRAPcc.W #<data>
FTRAPcc.L #<data>
FTST.<fmt> <ea>
FTST.X FPm
ILLEGAL
JMP <ea>
JSR <ea>
LEA <ea>,An
LINK An,dn
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