MC68LC040RC25A Datasheet, PDF (175/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
BCLK
A31–A0
UPA1, UPA0
SIZ1
SIZ0
C1
C2
BYTE
C1
C2
TT1, TT0
TM2–TM0
INTERRUPT LEVEL
R/W
CIOUT
TS
TIP
TA
AVEC
D31–D8
D7–D0
VECTOR #
INTERRUPT
ACKNOWLEDGE
WRITE STACK
Figure 7-22. Interrupt Acknowledge Bus Cycle Timing
7.5.1.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE BUS CYCLE. When the
interrupting device cannot supply a vector number, it requests an automatically generated
vector (autovector). Instead of placing a vector number on the data bus and asserting TA,
the device asserts the autovector (AVEC) signal with TA to terminate the cycle. AVEC is
only sampled with TA asserted. AVEC can be grounded if all interrupt requests are
autovectored.
The vector number supplied in an autovector operation is derived from the interrupt priority
level of the current interrupt. When the AVEC signal is asserted with TA during an interrupt
acknowledge bus cycle, the M68040 ignores the state of the data bus and internally
MOTOROLA
M68040 USER’S MANUAL
For More Information On This Product,
Go to: www.freescale.com
7-33