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MC68LC040RC25A Datasheet, PDF (258/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual
Freescale Semiconductor, Inc.
ENTRY
GUARD, ROUND,
AND STICKY BITS = 0
INEX2 ± 1
SELECT ROUNDING MODE
RN
RM
RP
GUARD AND LSB = 1,
ROUND AND STICKY = 0
OR
GUARD = 1
ROUND OR STICKY = 1
POS
NEG POS
NEG
INTERMEDIATE INTERMEDIATE
RESULT
RESULT
ADD 1 TO
LSB
ADD 1 TO
LSB
RZ
GUARD, ROUND,
AND STICKY ARE
CHOPPED
EXACT RESULT
OVERFLOW = 1
SHIFT MANTISSA
RIGHT 1 BIT,
ADD 1 TO EXPONENT
GUARD ± 0
ROUND ± 0
STICKY ± 0
EXIT
EXIT
Figure 9-8. Rounding Algorithm Flowchart
The three additional bits beyond the extended-precision format, the difference between
the intermediate result’s 67-bit mantissa and the stored result’s 64-bit mantissa, allow the
FPU to perform all calculations as though it were performing calculations using a float
engine with infinite bit precision. The result is always correct for the specified destination’s
data format before performing rounding (unless an overflow or underflow error occurs).
The specified rounding operation then produces a number that is as close as possible to
the infinitely precise intermediate value and still representable in the selected precision.
9-14
M68040 USER’S MANUAL
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