MC68LC040RC25A Datasheet, PDF (298/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
Instructions using the brief and full extension word format addressing modes cause the
<ea> calculate and execute stages to operate in an interlocked manner. When these
instructions wait to begin execution in the execution stage, there is a similar increase in
the <ea> calculate time. Figure 10-3 illustrates this effect for an ADD instruction using a
brief format extension word. The ADD instruction stalls for two clocks waiting to enter the
execution stage. Since this time exceeds by one clock the ADD lead time, the ADD
instruction remains in the <ea> calculate stage for one additional clock. If the ADD
instruction was in the execution stage for two clocks, the ABCD instruction would not have
stalled in the <ea> calculate stage.
LABEL
P1
A
B
N1
N2
INSTRUCTION
<ea>
CALCULATE
TRAPF
1
ABCD D0,D1
3
ADD.L 4(A0,D3),D2
5
TRAPF
1
TRAPF
1
EXECUTE
1
3
1L + 4
1
1
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12
<ea> CALCULATE P1 A B B B B* B B N1 N2
<ea> FETCH
P1 A B B B B B B N1 N2
EXECUTE
P1 A A A B B B B N1 N2
WRITE-BACK
NOTE: *Possible stalls in this stage.
Figure 10-3. Interlocked Stages
MOTOROLA
M68040 USER’S MANUAL
10-7
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