MC68LC040RC25A Datasheet, PDF (255/442 Pages) Freescale Semiconductor, Inc – M68040 Users Manual

Freescale Semiconductor, Inc.
Table 9-5. Extended-Precision Real
Format Summary (Continued)
NANs
Sign
Explicit Integer Bit
Biased Exponent Format Maximum
Mantissa
Representation of Mantissa
Nonsignaling
Signaling
Nonzero Bit Pattern Created by User
Mantissa When Created by FPCP
Approximate Ranges
Maximum Positive Normalized
Minimum Positive Normalized
Minimum Positive Denormalized
Don’t Care
Don’t Care
32767 ($7FFF)
Nonzero
x.1xxxx…xxxx
x.0xxxx…xxxx
x.xxxxx…xxxx
1.11111…1111
1.2 × 104932
1.7 × 10–4932
3.7 × 10–4951
Table 9-6. Packed Decimal Real Format Summary
Data Type SM SE Y
±Infinity
0/1
1
1
±NAN
0/1 1
1
±SNAN
0/1
1
1
+Zero
0 0/1 X
–Zero
1 0/1 X
+In-Range 0 0/1 X
–In-Range 1 0/1 X
Y
3-Digit
Exponent
1-Digit
Integer
16-Digit Fraction
1
$FFF
$XXXX
$00…00
1
$FFF
$XXXX
Nonzero
1
$FFF
$XXXX
Nonzero
X $000–$999
$XXX0
$00…00
X $000–$999
$XXX0
$00…00
X $000–$999 $XXX0–$XXX9 $00…01–$99…99
X $000–$999 $XXX0–$XXX9 $00…01–$99…99
9.4 COMPUTATIONAL ACCURACY
Whenever an attempt is made to represent a real number in a binary format of finite
precision, there is a possibility that the number can not be represented exactly. This is
commonly referred to as a round-off error. Furthermore, when two inexact numbers are
used in a calculation, the error present in each number is reflected, and possibly
aggravated, in the result. All FPU calculations use an intermediate result. When the
MC68040 performs an operation, the calculation is carried out using extended-precision
inputs, and the intermediate result is calculated as if to produce infinite precision. After the
calculation is complete, the intermediate result is rounded to the selected precision and
stored in the destination.
The FPCR encodings provide emulation for devices that only support single and double
precision. The execution speed of all instructions is the same whether using single- or
double-precision rounding. When using these two forced rounding precisions, the
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