PIC18F97J60 Datasheet, PDF (63/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 4-2: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
PSPCON
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 ----
0000 ----
uuuu ----
SPBRG1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
RCREG1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
TXREG1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
TXSTA1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0010
0000 0010
uuuu uuuu
RCSTA1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 000x
0000 000x
uuuu uuuu
EECON2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---- ----
---- ----
---- ----
EECON1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---0 x00-
---0 x00-
---u uuu-
IPR3
PIR3
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
0000 0000
1111 1111
0000 0000
uuuu uuuu
uuuu uuuu⁽³⁾
PIE3
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
IPR2
PIR2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1-11
0000 0-00
1111 1-11
0000 0-00
uuuu u-uu
uuuu u-uu⁽³⁾
PIE2
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0-00
0000 0-00
uuuu u-uu
IPR1
PIR1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
0000 0000
1111 1111
0000 0000
uuuu uuuu
uuuu uuuu⁽³⁾
PIE1
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 0000
0000 0000
uuuu uuuu
MEMCON PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0-00 --00
0-00 --00
u-uu --uu
OSCTUNE PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
0000 ----
0000 ----
uuuu ----
TRISJ
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--11 ----
--11 ----
--uu ----
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISH
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISG
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---1 ----
---1 ----
---u ----
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---1 1111
---1 1111
---u uuuu
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISF
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 111-
1111 111-
uuuu uuu-
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISE
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--11 1111
--11 1111
--uu uuuu
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISD
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
---- -111
---- -111
---- -uuu
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISC
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISB
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
1111 1111
1111 1111
uuuu uuuu
TRISA
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--11 1111
--11 1111
--uu uuuu
LATJ
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
--xx ----
--uu ----
--uu ----
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
LATH
PIC18F6XJ6X PIC18F8XJ6X PIC18F9XJ6X
xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend:
Note 1:
2:
3:
4:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 4-1 for Reset value for specific condition.
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 61