PIC18F97J60 Datasheet, PDF (352/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
REGISTER 24-5: CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
R/WO-1
R/WO-1
R/WO-1
R/WO-1 R/WO-1
U-0
WAIT⁽¹⁾
BW⁽¹⁾
EMB1⁽¹⁾
EMB0⁽¹⁾ EASHFT⁽¹⁾
—
bit 7
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
WO = Write-Once bit
-n = Value when device is unprogrammed
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
bit 6
bit 5-4
bit 3
bit 2-0
WAIT: External Bus Wait Enable bit⁽¹⁾
1 = Wait states for operations on external memory bus disabled
0 = Wait states for operations on external memory bus enabled and selected by MEMCON<5:4>
BW: Data Bus Width Select bit⁽¹⁾
1 = 16-Bit Data Width mode
0 = 8-Bit Data Width mode
EMB1:EMB0: External Memory Bus Configuration bits⁽¹⁾
11 = Microcontroller mode, external bus disabled
10 = Extended Microcontroller mode,12-Bit Address mode
01 = Extended Microcontroller mode,16-Bit Address mode
00 = Extended Microcontroller mode, 20-Bit Address mode
EASHFT: External Address Bus Shift Enable bit⁽¹⁾
1 = Address shifting enabled; address on external bus is offset to start at 000000h
0 = Address shifting disabled; address on external bus reflects the PC value
Unimplemented: Read as ‘0’
Note 1: Implemented on 100-pin devices only.
DS39762A-page 350
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© 2006 Microchip Technology Inc.