PIC18F97J60 Datasheet, PDF (197/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
FIGURE 17-2:
PWM OUTPUT RELATIONSHIPS (ACTIVE-HIGH STATE)
CCP1CON<7:6>
SIGNAL
0
Duty
Cycle
Period
00 (Single Output)
10 (Half-Bridge)
(Full-Bridge,
01 _Forward)
11
(Full-Bridge,
Reverse)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
Delay⁽¹⁾
Delay⁽¹⁾
PR2 + 1
FIGURE 17-3:
PWM OUTPUT RELATIONSHIPS (ACTIVE-LOW STATE)
CCP1CON<7:6>
SIGNAL
0
Duty
Cycle
Period
00 (Single Output)
10 (Half-Bridge)
(Full-Bridge,
01 _Forward)
(Full-Bridge,
11
Reverse)
P1A Modulated
P1A Modulated
P1B Modulated
P1A Active
P1B Inactive
P1C Inactive
P1D Modulated
P1A Inactive
P1B Modulated
P1C Active
P1D Inactive
Delay⁽¹⁾
Delay⁽¹⁾
PR2 + 1
Relationships:
• Period = 4 * TOSC * (PR2 + 1) * (TMR2 Prescale Value)
• Duty Cycle = TOSC * (CCPR1L<7:0>:CCP1CON<5:4>) * (TMR2 Prescale Value)
• Delay = 4 * TOSC * (ECCP1DEL<6:0>)
Note 1: Dead-band delay is programmed using the ECCP1DEL register (Section 17.4.6 “Programmable
Dead-Band Delay”).
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 195