PIC18F97J60 Datasheet, PDF (298/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
FIGURE 19-29:
BUS COLLISION DURING START CONDITION (SCLx = 0)
SDAx = 0, SCLx = 1
SDAx
TBRG
TBRG
SCLx
Set SEN, enable Start
sequence if SDAx = 1, SCLx = 1
SEN
BCLxIF
SCLx = 0 before BRG time-out,
bus collision occurs. Set BCLxIF.
S ^{‘0’}
SSPxIF ^{‘0’}
SCLx = 0 before SDAx = 0,
bus collision occurs. Set BCLxIF.
Interrupt cleared
in software
‘0’
‘0’
FIGURE 19-30: BRG RESET DUE TO SDAx ARBITRATION DURING START CONDITION
Less than TBRG
SDAx = 0, SCLx = 1
Set S
TBRG
SDAx SDAx pulled low by other master.
Reset BRG and assert SDAx.
Set SSPxIF
SCLx
SEN
BCLxIF
S
SCLx pulled low after BRG
time-out
Set SEN, enable Start
sequence if SDAx = 1, SCLx = 1
‘0’
S
SSPxIF
SDAx = 0, SCLx = 1,
set SSPxIF
Interrupts cleared
in software
DS39762A-page 296
Advance Information
© 2006 Microchip Technology Inc.