PIC18F97J60 Datasheet, PDF (190/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 16-4: REGISTERS ASSOCIATED WITH PWM, TIMER2 AND TIMER4
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF RBIF
59
RCON
IPEN
—
—
RI
TO
PD
POR
BOR
60
PIR1
PSPIF
ADIF
RC1IF
TX1IF SSP1IF CCP1IF TMR2IF TMR1IF
61
PIE1
PSPIE
ADIE
RC1IE
TX1IE SSP1IE CCP1IE TMR2IE TMR1IE
61
IPR1
PSPIP
ADIP
RC1IP
TX1IP SSP1IP CCP1IP TMR2IP TMR1IP
61
PIR3
SSP2IF BCL2IF RC2IF
TX2IF TMR4IF CCP5IF CCP4IF CCP3IF
61
PIE3
SSP2IE BCL2IE RC2IE
TX2IE TMR4IE CCP5IE CCP4IE CCP3IE
61
IPR3
TRISG
SSP2IP BCL2IP RC2IP
TX2IP TMR4IP CCP5IP CCP4IP CCP3IP
61
TRISG7 TRISG6 TRISG5 TRISG4 TRISG3⁽¹⁾ TRISG2 TRISG1 TRISG0
61
TMR2
Timer2 Register
60
PR2
Timer2 Period Register
60
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0 60
TMR4
Timer4 Register
62
PR4
Timer4 Period Register
62
T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0 62
CCPR4L Capture/Compare/PWM Register 4 Low Byte
62
CCPR4H Capture/Compare/PWM Register 4 High Byte
62
CCPR5L Capture/Compare/PWM Register 5 Low Byte
63
CCPR5H Capture/Compare/PWM Register 5 High Byte
63
CCP4CON
—
—
DC4B1 DC4B0 CCP4M3 CCP4M2 CCP4M1 CCP4M0 63
CCP5CON
—
—
DC5B1 DC5B0 CCP5M3 CCP5M2 CCP5M1 CCP5M0 63
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM, Timer2 or Timer4.
Note 1: This bit is only available in 80-pin and 100-pin devices; otherwise, it is unimplemented and reads as ‘0’.
DS39762A-page 188
Advance Information
© 2006 Microchip Technology Inc.