PIC18F97J60 Datasheet, PDF (306/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
REGISTER 20-3: BAUDCONx: BAUD RATE CONTROL REGISTER
R/W-0
R-1
R/W-0
R/W-0
R/W-0
U-0
ABDOVF
RCIDL
RXDTP
TXCKP
BRG16
—
bit 7
R/W-0
WUE
R/W-0
ABDEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
ABDOVF: Auto-Baud Acquisition Rollover Status bit
1 = A BRG rollover has occurred during Auto-Baud Rate Detect mode (must be cleared in software)
0 = No BRG rollover has occurred
bit 6
RCIDL: Receive Operation Idle Status bit
1 = Receive operation is Idle
0 = Receive operation is active
bit 5
RXDTP: Received Data Polarity Select bit
Asynchronous mode:
1 = RXx data is inverted
0 = RXx data received is not inverted
Synchronous modes:
1 = CKx clocks are inverted
0 = CKx clocks are not inverted
bit 4
TXCKP: Clock and Data Polarity Select bit
Asynchronous mode:
1 = TXx data is inverted
0 = TXx data is not inverted
Synchronous modes:
1 = CKx clocks are inverted
0 = CKx clocks are not inverted
bit 3
BRG16: 16-Bit Baud Rate Register Enable bit
1 = 16-bit Baud Rate Generator – SPBRGHx and SPBRGx
0 = 8-bit Baud Rate Generator – SPBRGx only, SPBRGHx value ignored (Compatible mode)
bit 2
Unimplemented: Read as ‘0’
bit 1
WUE: Wake-up Enable bit
Asynchronous mode:
1 = EUSARTx will continue to sample the RXx pin – interrupt generated on falling edge; bit cleared in
hardware on following rising edge
0 = RXx pin not monitored or rising edge detected
Synchronous mode:
Unused in this mode.
bit 0
ABDEN: Auto-Baud Detect Enable bit
Asynchronous mode:
1 = Enable baud rate measurement on the next character. Requires reception of a Sync field (55h);
cleared in hardware upon completion.
0 = Baud rate measurement disabled or completed
Synchronous mode:
Unused in this mode.
DS39762A-page 304
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© 2006 Microchip Technology Inc.