PIC18F97J60 Datasheet, PDF (436/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
FIGURE 27-8:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
VDD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
I/O pins
Note: Refer to Figure 27-3 for load conditions.
30
31
34
34
FIGURE 27-9:
BROWN-OUT RESET TIMING
VDD
VIRVST
Enable Internal
Reference Voltage
Internal Reference
Voltage Stable
BVDD
35
36
VBGAP = 1.2V
TABLE 27-12: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Typ Max Units
Conditions
30
TMCL MCLR Pulse Width (low)
31
TWDT Watchdog Timer Time-out Period
(no postscaler)
32
TOST Oscillation Start-up Timer Period
33
TPWRT Power-up Timer Period
34
TIOZ I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
38
TCSD CPU Start-up Time
Legend: TBD = To Be Determined
2
—
—
μs
2.8
4.1
5.4
ms
1024 TOSC — 1024 TOSC
46.2
66
85.8
—
2
—
— TOSC = OSC1 period
ms
μs
—
TBD
—
μs
DS39762A-page 434
Advance Information
© 2006 Microchip Technology Inc.