PIC18F97J60 Datasheet, PDF (224/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
REGISTER 18-12: PHCON2: PHY CONTROL REGISTER 2
U-0
—
bit 15
R/W-0
FRCLNK
R/W-0
TXDIS
R/W-x
r
R/W-x
r
R/W-0
JABBER
R/W-0
r
R/W-0
HDLDIS
bit 8
R/W-x
r
bit 7
R/W-x
r
R/W-x
r
R/W-x
r
R/W-x
r
R/W-x
r
R/W-x
r
R/W-x
r
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-11
bit 10
bit 9
bit 8
bit 7-0
Unimplemented: Read as ‘0’
FRCLNK: PHY Force Linkup bit
1 = Force linkup even when no link partner is detected
0 = Normal operation
TXDIS: Twisted-Pair Transmitter Disable bit
1 = Disable twisted-pair transmitter
0 = Normal operation
Reserved: Write as ‘0’
JABBER: Jabber Correction Disable bit
1 = Disable jabber correction
0 = Normal operation
Reserved: Write as ‘0’
HDLDIS: PHY Half-Duplex Loopback Disable bit
When PHCON1<8> = 1 or PHCON1<14> = 1:
This bit is ignored.
When PHCON1<8> = 0 and PHCON1<14> = 0:
1 = Transmitted data will only be sent out on the twisted-pair interface
0 = Transmitted data will be looped back to the MAC and sent out on the twisted-pair interface
Reserved: Write as ‘0’
DS39762A-page 222
Advance Information
© 2006 Microchip Technology Inc.