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| PIC18F97J60 Datasheet, PDF (315/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet | |||
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PIC18F97J60 FAMILY
TABLE 20-5: REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF
59
PIR1
PSPIF ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF 61
PIE1
PSPIE ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE 61
IPR1
PIR3
PIE3
IPR3
PSPIP ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP 61
SSP2IF BCL2IF RC2IF TX2IF(1) TMR4IF CCP5IF CCP4IF CCP3IF
61
SSP2IE BCL2IE RC2IE TX2IE(1) TMR4IE CCP5IE CCP4IE CCP3IE
61
SSP2IP BCL2IP RC2IP TX2IP(1) TMR4IP CCP5IP CCP4IP CCP3IP
61
RCSTAx
SPEN
RX9
SREN CREN ADDEN FERR OERR RX9D
61
TXREGx
EUSARTx Transmit Register
61
TXSTAx
CSRC
TX9
TXEN SYNC SENDB BRGH TRMT TX9D
61
BAUDCONx ABDOVF RCIDL RXDTP TXCKP BRG16
â
WUE ABDEN 62
SPBRGHx EUSARTx Baud Rate Generator Register High Byte
62
SPBRGx
EUSARTx Baud Rate Generator Register Low Byte
62
Legend: â = unimplemented locations read as â0â. Shaded cells are not used for asynchronous transmission.
Note 1: These bits are only available in 80-pin and 100-pin devices; otherwise, they are unimplemented and read
as â0â.
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 313
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