PIC18F97J60 Datasheet, PDF (141/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 10-5: PORTB FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RB0/INT0/FLT0 RB0
0
O DIG LATB<0> data output.
1
I
TTL PORTB<0> data input; weak pull-up when RBPU bit is cleared.
INT0
1
I
ST External interrupt 0 input.
FLT0
1
I
ST Enhanced PWM Fault input (ECCP1 module); enabled in software.
RB1/INT1
RB1
0
O DIG LATB<1> data output.
1
I
TTL PORTB<1> data input; weak pull-up when RBPU bit is cleared.
INT1
1
I
ST External interrupt 1 input.
RB2/INT2
RB2
0
O DIG LATB<2> data output.
1
I
TTL PORTB<2> data input; weak pull-up when RBPU bit is cleared.
INT2
1
I
ST External interrupt 2 input.
RB3/INT3/
ECCP2/P2A
RB3
0
O DIG LATB<3> data output.
1
I
TTL PORTB<3> data input; weak pull-up when RBPU bit is cleared.
INT3
1
ECCP2⁽¹⁾
0
I
ST External interrupt 3 input.
O DIG CCP2 Compare output and CCP2 PWM output; takes priority over port data.
1
I
ST CCP2 Capture input.
P2A⁽¹⁾
0
O DIG ECCP2 Enhanced PWM output, channel A. May be configured for tri-state
during Enhanced PWM shutdown events. Takes priority over port data.
RB4/KBI0
RB4
0
O DIG LATB<4> data output.
1
I
TTL PORTB<4> data input; weak pull-up when RBPU bit is cleared.
KBI0
1
I
TTL Interrupt-on-pin change.
RB5/KBI1
RB5
0
O DIG LATB<5> data output.
1
I
TTL PORTB<5> data input; weak pull-up when RBPU bit is cleared.
KBI1
1
I
TTL Interrupt-on-pin change.
RB6/KBI2/PGC RB6
0
O DIG LATB<6> data output.
1
I
TTL PORTB<6> data input; weak pull-up when RBPU bit is cleared.
KBI2
1
I
TTL Interrupt-on-pin change.
PGC
x
I
ST Serial execution (ICSP™) clock input for ICSP and ICD operation.⁽²⁾
RB7/KBI3/PGD RB7
0
O DIG LATB<7> data output.
1
I
TTL PORTB<7> data input; weak pull-up when RBPU bit is cleared.
KBI3
PGD
1
I
TTL Interrupt-on-pin change.
x
O DIG Serial execution data output for ICSP and ICD operation.⁽²⁾
x
I
ST Serial execution data input for ICSP and ICD operation.⁽²⁾
Legend:
Note 1:
2:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Alternate assignment for ECCP2/P2A when the CCP2MX Configuration bit is cleared (100-pin devices in Extended
Microcontroller mode). Default assignment is RC1.
All other pin functions are disabled when ICSP or ICD is enabled.
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 139