PIC18F97J60 Datasheet, PDF (38/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 1-6: PIC18F96J60/96J65/97J60 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number _{Pin Buffer}
TQFP
Type Type
Description
RH0/A16
RH0
A16
PORTH is a bidirectional I/O port.
99
I/O
ST
Digital I/O.
O
—
External memory address 16.
RH1/A17
RH1
A17
100
I/O
ST
Digital I/O.
O
—
External memory address 17.
RH2/A18
RH2
A18
1
I/O
ST
Digital I/O.
O
—
External memory address 18.
RH3/A19
RH3
A19
2
I/O
ST
Digital I/O.
O
—
External memory address 19.
RH4/AN12/P3C
RH4
AN12
P3C⁽⁵⁾
27
I/O
ST
Digital I/O.
I Analog
Analog input 12.
O
—
ECCP3 PWM output C.
RH5/AN13/P3B
RH5
AN13
P3B⁽⁵⁾
26
I/O
ST
Digital I/O.
I Analog
Analog input 13.
O
—
ECCP3 PWM output B.
RH6/AN14/P1C
RH6
AN14
P1C⁽⁵⁾
25
I/O
ST
Digital I/O.
I Analog
Analog input 14.
O
—
ECCP1 PWM output C.
RH7/AN15/P1B
RH7
AN15
P1B⁽⁵⁾
24
I/O
ST
Digital I/O.
I Analog
Analog input 15.
O
—
ECCP1 PWM output B.
Legend:
Note 1:
2:
3:
4:
5:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I = Input
O
= Output
P = Power
OD
= Open-Drain (no P diode to VDD)
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Extended Microcontroller mode).
Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX Configuration bit is set).
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
Alternate assignment for ECCP2/P2A when CCP2MX Configuration bit is cleared (Microcontroller mode).
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
DS39762A-page 36
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© 2006 Microchip Technology Inc.