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PIC18F97J60 Datasheet, PDF (202/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet
PIC18F97J60 FAMILY
17.4.6 PROGRAMMABLE DEAD-BAND
DELAY
In half-bridge applications, where all power switches
are modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current
(shoot-through current) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from flow-
ing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally program-
mable dead-band delay is available to avoid
shoot-through current from destroying the bridge
power switches. The delay occurs at the signal
transition from the non-active state to the active state.
See Figure 17-4 for illustration. The lower seven bits of
the ECCPxDEL register (Register 17-2) set the delay
period in terms of microcontroller instruction cycles
(TCY or 4 TOSC).
17.4.7 ENHANCED PWM
AUTO-SHUTDOWN
When the ECCP1 is programmed for any of the
Enhanced PWM modes, the active output pins may be
configured for auto-shutdown. Auto-shutdown immedi-
ately places the Enhanced PWM output pins into a
defined shutdown state when a shutdown event
occurs.
A shutdown event can be caused by either of the two
comparator modules or the FLT0 pin (or any combina-
tion of these three sources). The comparators may be
used to monitor a voltage input proportional to a current
being monitored in the bridge circuit. If the voltage
exceeds a threshold, the comparator switches state and
triggers a shutdown. Alternatively, a low-level digital
signal on the FLT0 pin can also trigger a shutdown. The
auto-shutdown feature can be disabled by not selecting
any auto-shutdown sources. The auto-shutdown
sources to be used are selected using the
ECCP1AS2:ECCP1AS0 bits (bits<6:4> of the
ECCP1AS register).
When a shutdown occurs, the output pins are
asynchronously placed in their shutdown states,
specified by the PSS1AC1:PSS1AC0 and
PSS1BD1:PSS1BD0 bits (ECCP1AS3:ECCP1AS0).
Each pin pair (P1A/P1C and P1B/P1D) may be set to
drive high, drive low or be tri-stated (not driving). The
ECCP1ASE bit (ECCP1AS<7>) is also set to hold the
Enhanced PWM outputs in their shutdown states.
The ECCP1ASE bit is set by hardware when a shutdown
event occurs. If automatic restarts are not enabled, the
ECCP1ASE bit is cleared by firmware when the cause of
the shutdown clears. If automatic restarts are enabled,
the ECC1PASE bit is automatically cleared when the
cause of the auto-shutdown has cleared.
If the ECCP1ASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCP1ASE bit is cleared,
the PWM outputs will return to normal operation at the
beginning of the next PWM period.
Note: Writing to the ECCP1ASE bit is disabled
while a shutdown condition is active.
REGISTER 17-2: ECCPxDEL: ECCPx DEAD-BAND DELAY REGISTER
R/W-0
PxRSEN
bit 7
R/W-0
PxDC6
R/W-0
PxDC5
R/W-0
PxDC4
R/W-0
PxDC3
R/W-0
PxDC2
R/W-0
PxDC1
R/W-0
PxDC0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-0
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
away; the PWM restarts automatically
0 = Upon auto-shutdown, ECCPxASE must be cleared in software to restart the PWM
PxDC6:PxDC0: PWM Delay Count bits
Delay time, in number of FOSC/4 (4 * TOSC) cycles, between the scheduled and actual time for a PWM
signal to transition to active.
DS39762A-page 200
Advance Information
© 2006 Microchip Technology Inc.