PIC18F97J60 Datasheet, PDF (208/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
18.1 Physical Interfaces and External
Connections
18.1.1 SIGNAL AND POWER INTERFACES
PIC18F97J60 family devices all provide a dedicated
4-pin signal interface for the Ethernet module. No other
microcontroller or peripheral functions are multiplexed
with these pins, so potential device configuration
conflicts do not need to be considered. The pins are:
• TPIN+: Differential plus twisted-pair input
• TPIN-: Differential minus twisted-pair input
• TPOUT+: Differential plus twisted-pair output
• TPOUT-: Differential minus twisted-pair output
Provisions are not made for providing or receiving digital
Ethernet data from an external Ethernet controller or
MAC/PHY subsystem.
In addition to the signal connections, the Ethernet mod-
ule has its own independent voltage source and ground
connections for the PHY module. Separate connections
are provided for the receiver (VDDRX and VSSRX), the
transmitter (VDDTX and VSSTX) and the transmitter’s
internal PLL (VDDPLL and VSSPLL). Although the voltage
requirements are the same as VDD and VSS for the
microcontroller, the pins are not internally connected.
For the Ethernet module to operate properly, supply
voltage and ground must also be connected to these
pins. A microcontroller power and ground supply pins
should be externally connected to the same power
source or ground node.
Besides the independent voltage connections, the PHY
module has a separate bias current input pin, RBIAS. A
bias current must be applied to RBIAS for proper
transceiver operation.
18.1.2 LED CONFIGURATION
The PHY module provides separate outputs to drive the
standard Ethernet indicators, LEDA and LEDB. The LED
outputs are multiplexed with PORTA pins RA0 and RA1.
Their use as LED outputs is enabled by setting the Con-
figuration bit, ETHLED (Register 24-6, CONFIG3H<2>).
When configured as LED outputs, RA0/LEDA and
RA1/LEDB have sufficient drive capacity (8 mA) to
directly power the LEDs. The pins must always be
configured to supply current to (source) the LEDs. Users
must also configure the pins as outputs, by clearing
TRISA<1:0>.
The LEDs can be individually configured to
automatically display link status, RX/TX activity, etc. A
configurable stretch capability prolongs the LED blink
duration for short events, such as a single packet
transmit, allowing human perception. The options are
controlled by the PHLCON register (Register 18-14).
Typical values for blink stretch are listed in Table 18-1.
TABLE 18-1: LED BLINK STRETCH
LENGTH
Stretch Length
Typical Stretch (ms)
TNSTRCH (normal)
40
TMSTRCH (medium)
70
TLSTRCH (long)
140
18.1.3 OSCILLATOR REQUIREMENTS
The Ethernet module is designed to operate at 25 MHz.
This is provided by the primary microcontroller clock,
either with a crystal connected to the OSC1 and OSC2
pins or an external clock source connected to the
OSC1 pin. No provision is made to clock the module
from a different source.
18.1.3.1 Start-up Timer
The Ethernet module contains a start-up timer,
independent of the microcontroller’s OST, to ensure
that the PHY module’s PLL has stabilized before
operation. Clearing the module enable bit, ETHEN
(ECON2<5>), clears the PHYRDY status bit
(ESTAT<0>). Setting the ETHEN bit causes this
start-up timer to start counting. When the timer expires,
after 1 ms, the PHYRDY bit will be automatically set.
The application software should always poll PHYRDY
as necessary to determine when normal Ethernet
operation can begin.
DS39762A-page 206
Advance Information
© 2006 Microchip Technology Inc.