PIC18F97J60 Datasheet, PDF (273/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

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19.4.3.2 Address Masking
Masking an address bit causes that bit to become a
“don’t care”. When one address bit is masked, two
addresses will be Acknowledged and cause an
interrupt. It is possible to mask more than one address
bit at a time, which makes it possible to Acknowledge
up to 31 addresses in 7-bit mode and up to
63 addresses in 10-bit mode (see Example 19-2).
The I²C Slave behaves the same way whether address
masking is used or not. However, when address
masking is used, the I²C slave can Acknowledge
multiple addresses and cause interrupts. When this
occurs, it is necessary to determine which address
caused the interrupt by checking SSPxBUF.
In 7-Bit Address mode, address mask bits, ADMSK<5:1>
(SSPxCON2<5:1>), mask the corresponding address
bits in the SSPxADD register. For any ADMSK bits that
are set (ADMSK<n> = 1), the corresponding address bit
is ignored (SSPxADD<n> = x). For the module to issue
an address acknowledge, it is sufficient to match only on
addresses that do not have an active address mask.
In 10-Bit Address mode, bits ADMSK<5:2> mask the
corresponding address bits in the SSPxADD register.
In addition, ADMSK1 simultaneously masks the two
LSbs of the address (SSPxADD<1:0>). For any
ADMSK bits that are active (ADMSK<n> = 1), the cor-
responding address bit is ignored (SSPxADD<n> = x).
Also note, that although in 10-Bit Addressing mode, the
upper address bits reuse part of the SSPxADD register
bits. The address mask bits do not interact with those
bits; they only affect the lower address bits.
Note 1: ADMSK1 masks the two Least Significant
bits of the address.
2: The two Most Significant bits of the
address are not affected by address
masking.
EXAMPLE 19-2: ADDRESS MASKING EXAMPLES
7-bit addressing:
SSPxADD<7:1> = A0h (1010000) (SSPxADD<0> is assumed to be ‘0’)
ADMSK<5:1> = 00111
Addresses Acknowledged: A0h, A2h, A4h, A6h, A8h, AAh, ACh, AEh
10-bit addressing:
SSPxADD<7:0> = A0h (10100000) (the two MSb of the address are ignored in this example since they are
not affected by masking)
ADMSK<5:1> = 00111
Addresses Acknowledged: A0h, A1h, A2h, A3h, A4h, A5h, A6h, A7h, A8h, A9h, AAh, ABh, ACh, ADh, AEh, AFh
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 271