PIC18F97J60 Datasheet, PDF (285/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
19.4.5 GENERAL CALL ADDRESS
SUPPORT
The addressing procedure for the I²C bus is such that
the first byte after the Start condition usually
determines which device will be the slave addressed by
the master. The exception is the general call address,
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I²C protocol. It
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the
General Call Enable bit, GCEN, is enabled
(SSPxCON2<7> set). Following a Start bit detect, 8 bits
are shifted into the SSPxSR and the address is
compared against the SSPxADD. It is also compared to
the general call address and fixed in hardware.
If the general call address matches, the SSPxSR is
transferred to the SSPxBUF, the BF flag bit is set
(eighth bit) and on the falling edge of the ninth bit (ACK
bit), the SSPxIF interrupt flag bit is set.
When the interrupt is serviced, the source for the
interrupt can be checked by reading the contents of the
SSPxBUF. The value can be used to determine if the
address was device specific or a general call address.
In 10-Bit Address mode, the SSPxADD is required to
be updated for the second half of the address to match
and the UA bit is set (SSPxSTAT<1>). If the general call
address is sampled when the GCEN bit is set, while the
slave is configured in 10-Bit Address mode, then the
second half of the address is not necessary, the UA bit
will not be set and the slave will begin receiving data
after the Acknowledge (Figure 19-17).
FIGURE 19-17:
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESS MODE)
SDAx
General Call Address
Address is compared to General Call Address
after ACK, set interrupt
R/W = 0
Receiving Data
ACK
ACK D7 D6 D5 D4 D3 D2 D1 D0
SCLx
SSPxIF
S
1 2 34 5 6 78 91 2 34 5 6 78 9
BF (SSPxSTAT<0>)
SSPOV (SSPxCON1<6>)
GCEN (SSPxCON2<7>)
Cleared in software
SSPxBUF is read
‘0’
‘1’
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 283