PIC18F97J60 Datasheet, PDF (42/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
2.3 Crystal Oscillator/Ceramic
Resonators (HS Modes)
In HS or HSPLL Oscillator modes, a crystal is
connected to the OSC1 and OSC2 pins to establish
oscillation. Figure 2-2 shows the pin connections.
The oscillator design requires the use of a parallel cut
crystal.
Note:
Use of a series cut crystal may give a fre-
quency out of the crystal manufacturer’s
specifications.
FIGURE 2-2:
CRYSTAL OSCILLATOR
OPERATION (HS OR
HSPLL CONFIGURATION)
C1⁽¹⁾
OSC1
XTAL
C2⁽¹⁾
OSC2
RS⁽²⁾
RF⁽³⁾
To
Internal
Logic
Sleep
PIC18FXXJ6X
Note 1: See Table 2-1 for initial values of C1 and C2.
2: A series resistor (RS) may be required for AT
strip cut crystals.
3: RF varies with the oscillator mode chosen.
TABLE 2-1: CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
Osc Type
Crystal
Freq.
Typical Capacitor Values
Tested:
C1
C2
HS
25 MHz
15 pF
15 pF
Capacitor values are for design guidance only.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
VDD and temperature range for the application. Refer
to the following application notes for oscillator specific
information:
• AN588, “PICmicro^® Microcontroller Oscillator
Design Guide”
• AN826, “Crystal Oscillator Basics and Crystal
Selection for rfPIC^® and PICmicro^® Devices”
• AN849, “Basic PICmicro^® Oscillator Design”
• AN943, “Practical PICmicro^® Oscillator Analysis
and Design”
• AN949, “Making Your Oscillator Work”
See the notes following this table for additional
information.
Note 1: Higher capacitance increases the stability
of the oscillator but also increases the
start-up time.
2: Since each crystal has its own character-
istics, the user should consult the crystal
manufacturer for appropriate values of
external components.
3: Rs may be required to avoid overdriving
crystals with low drive level specifications.
4: Always verify oscillator performance over
the VDD and temperature range that is
expected for the application.
2.4 External Clock Input (EC Modes)
The EC and ECPLL Oscillator modes require an exter-
nal clock source to be connected to the OSC1 pin.
There is no oscillator start-up time required after a
Power-on Reset or after an exit from Sleep mode.
In the EC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 2-3 shows the pin connections for the EC
Oscillator mode.
FIGURE 2-3:
EXTERNAL CLOCK
INPUT OPERATION
(EC CONFIGURATION)
Clock from
Ext. System
FOSC/4
OSC1/CLKI
PIC18FXXJ6X
OSC2/CLKO
An external clock source may also be connected to the
OSC1 pin in the HS mode, as shown in Figure 2-4. In
this configuration, the OSC2 pin is left open.
FIGURE 2-4:
EXTERNAL CLOCK INPUT
OPERATION (HS OSC
CONFIGURATION)
Clock from
Ext. System
Open
OSC1
PIC18FXXJ6X
(HS Mode)
OSC2
DS39762A-page 40
Advance Information
© 2006 Microchip Technology Inc.