PIC18F97J60 Datasheet, PDF (468/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
Timer0 .............................................................................. 163
Associated Registers ............................................... 165
Operation ................................................................. 164
Overflow Interrupt .................................................... 165
Prescaler .................................................................. 165
Prescaler Assignment (PSA Bit) .............................. 165
Prescaler Select (T0PS2:T0PS0 Bits) ..................... 165
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode ............................ 164
Source Edge Select (T0SE Bit) ................................ 164
Source Select (T0CS Bit) ......................................... 164
Switching Prescaler Assignment .............................. 165
Timer1 .............................................................................. 167
16-Bit Read/Write Mode ........................................... 169
Associated Registers ............................................... 171
Interrupt .................................................................... 170
Operation ................................................................. 168
Oscillator .......................................................... 167, 169
Layout Considerations ..................................... 170
Overflow Interrupt .................................................... 167
Resetting, Using the ECCP
Special Event Trigger ....................................... 170
Special Event Trigger (ECCP) ................................. 192
TMR1H Register ...................................................... 167
TMR1L Register ....................................................... 167
Use as a Clock Source ............................................ 169
Use as a Real-Time Clock ....................................... 170
Timer2 .............................................................................. 173
Associated Registers ............................................... 174
Interrupt .................................................................... 174
Operation ................................................................. 173
Output ...................................................................... 174
PR2 Register .................................................... 186, 193
TMR2 to PR2 Match Interrupt .................................. 193
Timer3 .............................................................................. 175
16-Bit Read/Write Mode ........................................... 177
Associated Registers ............................................... 177
Operation ................................................................. 176
Oscillator .......................................................... 175, 177
Overflow Interrupt ............................................ 175, 177
Special Event Trigger (ECCP) ................................. 177
TMR3H Register ...................................................... 175
TMR3L Register ....................................................... 175
Timer4 .............................................................................. 179
Associated Registers ............................................... 180
MSSP Clock ............................................................. 180
Operation ................................................................. 179
Postscaler. See Postscaler, Timer4.
PR4 Register .................................................... 179, 186
Prescaler. See Prescaler, Timer4.
TMR4 Register ......................................................... 179
TMR4 to PR4 Match Interrupt .......................... 179, 180
Timing Diagrams
A/D Conversion ........................................................ 446
Asynchronous Reception, RXDTP = 0
(RXx Not Inverted) ........................................... 315
Asynchronous Transmission (Back-to-Back),
TXCKP = 0 (TXx Not Inverted) ........................ 312
Asynchronous Transmission, TXCKP = 0
(TXx Not Inverted) ............................................ 312
Automatic Baud Rate Calculation ............................ 310
Auto-Wake-up Bit (WUE) During
Normal Operation ............................................. 317
Auto-Wake-up Bit (WUE) During Sleep ................... 317
Baud Rate Generator with Clock Arbitration ............ 287
BRG Overflow Sequence ......................................... 310
BRG Reset Due to SDAx Arbitration
During Start Condition ..................................... 296
Brown-out Reset (BOR) ........................................... 434
Capture/Compare/PWM (Including
ECCP Modules) ............................................... 436
CLKO and I/O .......................................................... 431
Clock Synchronization ............................................. 280
Clock/Instruction Cycle .............................................. 74
EUSART Synchronous Receive (Master/Slave) ...... 445
EUSART Synchronous Transmission
(Master/Slave) ................................................. 445
Example SPI Master Mode (CKE = 0) ..................... 437
Example SPI Master Mode (CKE = 1) ..................... 438
Example SPI Slave Mode (CKE = 0) ....................... 439
Example SPI Slave Mode (CKE = 1) ....................... 440
External Clock (All Modes Except PLL) ................... 429
External Memory Bus for Sleep (Extended
Microcontroller Mode) .............................. 112, 114
External Memory Bus for TBLRD (Extended
Microcontroller Mode) .............................. 112, 114
Fail-Safe Clock Monitor ........................................... 357
First Start Bit ............................................................ 288
Full-Bridge PWM Output .......................................... 197
Half-Bridge PWM Output ......................................... 196
I²C Acknowledge Sequence .................................... 293
I²C Bus Collision During a Repeated
Start Condition (Case 1) .................................. 297
I²C Bus Collision During a Repeated
Start Condition (Case 2) .................................. 297
I²C Bus Collision During a Stop
Condition (Case 1) ........................................... 298
I²C Bus Collision During a Stop
Condition (Case 2) ........................................... 298
I²C Bus Collision During Start
Condition (SCLx = 0) ....................................... 296
I²C Bus Collision During Start
Condition (SDAx Only) .................................... 295
I²C Bus Collision for Transmit and
Acknowledge ................................................... 294
I²C Bus Data ............................................................ 441
I²C Bus Start/Stop Bits ............................................ 441
I²C Master Mode (7 or 10-Bit Transmission) ........... 291
I²C Master Mode (7-Bit Reception) .......................... 292
I²C Slave Mode (10-Bit Reception, SEN = 0) .......... 276
I²C Slave Mode (10-Bit Reception,
SEN = 0, ADMSK = 01001) ............................. 277
I²C Slave Mode (10-Bit Reception, SEN = 1) .......... 282
I²C Slave Mode (10-Bit Transmission) .................... 278
I²C Slave Mode (7-Bit Reception, SEN = 0) ............ 273
I²C Slave Mode (7-Bit Reception, SEN = 0,
ADMSK = 01011) ............................................ 274
I²C Slave Mode (7-Bit Reception, SEN = 1) ............ 281
I²C Slave Mode (7-Bit Transmission) ...................... 275
I²C Slave Mode General Call Address Sequence
(7 or 10-Bit Address Mode) ............................. 283
I²C Stop Condition Receive or Transmit Mode ........ 293
Master SSP I²C Bus Data ........................................ 443
Master SSP I²C Bus Start/Stop Bits ........................ 443
Parallel Slave Port (PSP) Read ............................... 162
Parallel Slave Port (PSP) Write ............................... 161
Program Memory Read ........................................... 432
Program Memory Write ............................................ 433
PWM Auto-Shutdown (P1RSEN = 0,
Auto-Restart Disabled) .................................... 202
PWM Auto-Shutdown (P1RSEN = 1,
Auto-Restart Enabled) ..................................... 202
DS39762A-page 466
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