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PIC18F97J60 Datasheet, PDF (307/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet
PIC18F97J60 FAMILY
20.1 Baud Rate Generator (BRG)
The BRG is a dedicated 8-bit or 16-bit generator that
supports both the Asynchronous and Synchronous
modes of the EUSARTx. By default, the BRG operates
in 8-bit mode; setting the BRG16 bit (BAUDCONx<3>)
selects 16-bit mode.
The SPBRGHx:SPBRGx register pair controls the period
of a free-running timer. In Asynchronous mode, bits
BRGH (TXSTAx<2>) and BRG16 (BAUDCONx<3>) also
control the baud rate. In Synchronous mode, BRGH is
ignored. Table 20-1 shows the formula for computation of
the baud rate for different EUSARTx modes which only
apply in Master mode (internally generated clock).
Given the desired baud rate and FOSC, the nearest
integer value for the SPBRGHx:SPBRGx registers can
be calculated using the formulas in Table 20-1. From this,
the error in baud rate can be determined. An example
calculation is shown in Example 20-1. Typical baud rates
and error values for the various Asynchronous modes
are shown in Table 20-2. It may be advantageous to use
the high baud rate (BRGH = 1), or the 16-bit BRG to
reduce the baud rate error, or achieve a slow baud rate
for a fast oscillator frequency.
Writing a new value to the SPBRGHx:SPBRGx regis-
ters causes the BRG timer to be reset (or cleared). This
ensures that the BRG does not wait for a timer overflow
before outputting the new baud rate.
20.1.1 OPERATION IN POWER-MANAGED
MODES
The device clock is used to generate the desired baud
rate. When one of the power-managed modes is
entered, the new clock source may be operating at a
different frequency. This may require an adjustment to
the value in the SPBRGx register pair.
20.1.2 SAMPLING
The data on the RXx pin (either RC7/RX1/DT1 or
RG2/RX2/DT2) is sampled three times by a majority
detect circuit to determine if a high or a low level is
present at the RXx pin.
TABLE 20-1: BAUD RATE FORMULAS
Configuration Bits
SYNC
BRG16
BRGH
BRG/EUSARTx Mode
0
0
0
8-bit/Asynchronous
0
0
1
8-bit/Asynchronous
0
1
0
16-bit/Asynchronous
0
1
1
16-bit/Asynchronous
1
0
x
8-bit/Synchronous
1
1
x
16-bit/Synchronous
Legend: x = Don’t care, n = value of SPBRGHx:SPBRGx register pair
Baud Rate Formula
FOSC/[64 (n + 1)]
FOSC/[16 (n + 1)]
FOSC/[4 (n + 1)]
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 305