PIC18F97J60 Datasheet, PDF (463/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
Indexed Literal Offset Addressing
and Standard PIC18 Instructions ............................. 406
Indexed Literal Offset Mode ................................. 91, 93, 406
Indirect Addressing ............................................................ 89
INFSNZ ............................................................................ 381
Initialization Conditions for all Registers ...................... 59–65
Instruction Cycle ................................................................ 74
Clocking Scheme ....................................................... 74
Flow/Pipelining ........................................................... 74
Instruction Set .................................................................. 359
ADDLW .................................................................... 365
ADDWF .................................................................... 365
ADDWF (Indexed Literal Offset Mode) .................... 407
ADDWFC ................................................................. 366
ANDLW .................................................................... 366
ANDWF .................................................................... 367
BC ............................................................................ 367
BCF .......................................................................... 368
BN ............................................................................ 368
BNC ......................................................................... 369
BNN ......................................................................... 369
BNOV ....................................................................... 370
BNZ .......................................................................... 370
BOV ......................................................................... 373
BRA .......................................................................... 371
BSF .......................................................................... 371
BSF (Indexed Literal Offset Mode) .......................... 407
BTFSC ..................................................................... 372
BTFSS ..................................................................... 372
BTG .......................................................................... 373
BZ ............................................................................ 374
CALL ........................................................................ 374
CLRF ........................................................................ 375
CLRWDT .................................................................. 375
COMF ...................................................................... 376
CPFSEQ .................................................................. 376
CPFSGT .................................................................. 377
CPFSLT ................................................................... 377
DAW ......................................................................... 378
DCFSNZ .................................................................. 379
DECF ....................................................................... 378
DECFSZ ................................................................... 379
Extended Instructions .............................................. 401
Considerations when Enabling ........................ 406
Syntax .............................................................. 401
Use with MPLAB IDE Tools ............................. 408
General Format ........................................................ 361
GOTO ...................................................................... 380
INCF ......................................................................... 380
INCFSZ .................................................................... 381
INFSNZ .................................................................... 381
IORLW ..................................................................... 382
IORWF ..................................................................... 382
LFSR ........................................................................ 383
MOVF ....................................................................... 383
MOVFF .................................................................... 384
MOVLB .................................................................... 384
MOVLW ................................................................... 385
MOVWF ................................................................... 385
MULLW .................................................................... 386
MULWF .................................................................... 386
NEGF ....................................................................... 387
NOP ......................................................................... 387
POP ......................................................................... 388
PUSH ....................................................................... 388
RCALL ..................................................................... 389
RESET ..................................................................... 389
RETFIE .................................................................... 390
RETLW .................................................................... 390
RETURN .................................................................. 391
RLCF ....................................................................... 391
RLNCF ..................................................................... 392
RRCF ....................................................................... 392
RRNCF .................................................................... 393
SETF ....................................................................... 393
SETF (Indexed Literal Offset Mode) ........................ 407
SLEEP ..................................................................... 394
Standard Instructions ............................................... 359
SUBFWB ................................................................. 394
SUBLW .................................................................... 395
SUBWF .................................................................... 395
SUBWFB ................................................................. 396
SWAPF .................................................................... 396
TBLRD ..................................................................... 397
TBLWT .................................................................... 398
TSTFSZ ................................................................... 399
XORLW ................................................................... 399
XORWF ................................................................... 400
INTCON Register
RBIF Bit ................................................................... 138
INTCON Registers ........................................................... 121
Inter-Integrated Circuit. See I²C Mode.
Internal Oscillator Block ..................................................... 41
Internal RC Oscillator
Use with WDT .......................................................... 353
Internal Voltage Regulator Specifications ........................ 426
Internet Address .............................................................. 468
Interrupt Sources ............................................................. 345
A/D Conversion Complete ....................................... 329
Capture Complete (CCP) ........................................ 183
Compare Complete (CCP) ...................................... 184
Interrupt-on-Change (RB7:RB4) .............................. 138
INTx Pin ................................................................... 134
PORTB, Interrupt-on-Change .................................. 134
TMR0 ....................................................................... 134
TMR0 Overflow ........................................................ 165
TMR1 Overflow ........................................................ 167
TMR2 to PR2 Match (PWM) .................................... 193
TMR3 Overflow ................................................ 175, 177
TMR4 to PR4 Match ................................................ 180
TMR4 to PR4 Match (PWM) .................................... 179
Interrupts ......................................................................... 119
Interrupts, Flag Bits
Interrupt-on-Change (RB7:RB4)
Flag (RBIF Bit) ................................................. 138
INTOSC, INTRC. See Internal Oscillator Block.
IORLW ............................................................................. 382
IORWF ............................................................................. 382
IPR Registers ................................................................... 130
L
LFSR ............................................................................... 383
M
Master Clear (MCLR) ......................................................... 55
Master Synchronous Serial Port (MSSP). See MSSP.
Memory Organization ........................................................ 67
Data Memory ............................................................. 76
Program Memory ....................................................... 67
Memory Programming Requirements .............................. 425
Microchip Internet Web Site ............................................. 468
© 2006 Microchip Technology Inc.
Advance Information
DS39762A-page 461