PIC18F97J60 Datasheet, PDF (148/474 Pages) Microchip Technology – 64/80/100-Pin, High-Performance, 1 Mbit Flash Microcontrollers with Ethernet

PIC18F97J60 FAMILY
TABLE 10-9: PORTD FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RD4/AD4/
RD4⁽¹⁾
0
PSP4/SDO2⁽¹⁾
1
AD4⁽¹⁾
x
x
PSP4⁽¹⁾
x
O
DIG LATD<4> data output.
I
ST PORTD<4> data input.
O
DIG External memory interface, address/data bit 4 output.⁽²⁾
I
TTL External memory interface, data bit 4 input.⁽²⁾
O
DIG PSP read output data (LATD<4>); takes priority over port data.
x
SDO2⁽¹⁾
0
RD5/AD5/
RD5⁽¹⁾
0
PSP5/SDI2/
SDA2⁽¹⁾
AD5⁽¹⁾
1
x
x
PSP5⁽¹⁾
x
I
TTL PSP write data input.
O
DIG SPI data output (MSSP2 module); takes priority over port data.
O
DIG LATD<5> data output.
I
ST PORTD<5> data input.
O
DIG External memory interface, address/data bit 5 output.⁽²⁾
I
TTL External memory interface, data bit 5 input.⁽²⁾
O
DIG PSP read output data (LATD<5>); takes priority over port data.
x
SDI2⁽¹⁾
1
SDA2⁽¹⁾
1
1
RD6/AD6/
RD6⁽¹⁾
0
PSP6/SCK2/
SCL2⁽¹⁾
AD6⁽¹⁾
1
x
x
PSP6⁽¹⁾
x
I
TTL PSP write data input.
I
ST SPI data input (MSSP2 module).
O
DIG I²C™ data output (MSSP2 module); takes priority over port data.
I
ST I²C data input (MSSP2 module); input type depends on module
setting.
O
DIG LATD<6> data output.
I
ST PORTD<6> data input.
O DIG-3 External memory interface, address/data bit 6 output.⁽¹⁾
I
TTL External memory interface, data bit 6 input.⁽¹⁾
O
DIG PSP read output data (LATD<6>); takes priority over port data.
x
SCK2⁽¹⁾
0
I
TTL PSP write data input.
O
DIG SPI clock output (MSSP2 module); takes priority over port data.
1
SCL2⁽¹⁾
0
1
RD7/AD7/
RD7⁽¹⁾
0
PSP7/SS2⁽¹⁾
1
AD7⁽¹⁾
x
x
PSP7⁽¹⁾
x
I
ST SPI clock input (MSSP2 module).
O
DIG I²C clock output (MSSP2 module); takes priority over port data.
I
ST I²C clock input (MSSP2 module); input type depends on module
setting.
O
DIG LATD<7> data output.
I
ST PORTD<7> data input.
O
DIG External memory interface, address/data bit 7 output.⁽¹⁾
I
TTL External memory interface, data bit 7 input.⁽¹⁾
O
DIG PSP read output data (LATD<7>); takes priority over port data.
x
I
TTL PSP write data input.
SS2⁽¹⁾
x
I
TTL Slave select input for MSSP (MSSP2 module).
Legend:
Note 1:
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
These features or port pins are implemented only on 100-pin devices.
External memory interface I/O takes priority over all other digital and PSP I/O.
These features are implemented on this pin only on 64-pin devices; for all other devices, they are multiplexed with
RE6/RH7 (P1B), RG0 (ECCP3/P3A) or RG3 (CCP4/P3D).
DS39762A-page 146
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© 2006 Microchip Technology Inc.