MC68HC11KW1 Datasheet, PDF (85/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

4.6
EEPROM and CONFIG register
4.6.1 EEPROM
The 640-byte on-board EEPROM is initially located from $0D80 to $0FFF after reset in all modes.
It can be mapped to any other 4K page by writing to the INIT2 register. The EEPROM is enabled
by the EEON bit in the CONFIG register. Programming and erasing are controlled by the PPROG
register.
4
Unlike information stored in ROM, data in the 640 bytes of EEPROM can be erased and
reprogrammed under software control. Because programming and erasing operations use an
on-chip charge pump driven by V_DD, a separate external power supply is not required.
An internal charge pump supplies the programming voltage. Seven bits in the block protect
register (BPROT) prevent inadvertent writes to (or erases of) blocks of EEPROM, and the eighth
bit enables the low voltage EEPROM protect circuit (see Section 4.3.2.6). The CSEL bit in the
OPTION register selects an on-chip oscillator clock for programming and erasing the EEPROM
while operating at frequencies below 1MHz.
In special modes there is one extra row of EEPROM, which is used for factory testing. Endurance
and data retention specifications do not apply to these cells.
The erased state of each EEPROM byte is $FF.
4.6.1.1 PPROG — EEPROM programming control register
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
EEPROM programming (PPROG) $003B ODD EVEN
0
BYTE
ROW
ERASE EELAT
EEPG
M
0000 0000
Note:
Writes to EEPROM addresses are inhibited while EEPGM is one. A write to a different
EEPROM location is prevented while a program or erase operation is in progress.
ODD — Program odd rows in half of EEPROM (Test)
EVEN — Program even rows in half of EEPROM (Test)
If both ODD and EVEN are set to one then all odd and even rows in half of the EEPROM will be
programmed with the same data, within one programming cycle.
BYTE — EEPROM byte erase mode
1 (set) – Erase only one byte of EEPROM.
0 (clear) – Row or bulk erase mode used.
MC68HC11KW1
OPERATING MODES AND ON-CHIP MEMORY
4-41