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MC68HC11KW1 Datasheet, PDF (212/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit
A.5.1 Peripheral port timing
(VDD = 5.0Vdc ± 5%, VSS = 0Vdc, TA = TL to TH)
Characteristic (1)
4.0 MHz
Symbol
Unit
Min. Max.
Frequency of operation (E clock frequency)
fOP
0 4.0 MHz
E clock period
Peripheral data set-up time, all ports (2)
Peripheral data hold time, all ports (2)
tCYC 250 —
ns
tPDSU 100 —
ns
tPDH
50
—
ns
Delay time, peripheral data write
MCU write to port A, B, G[5:0], H, J or K
tPWD
— 200 ns
MCU write to port C, D or F (tPWD = tCYC/4 + 100ns)
— 162 ns
(1) All timing is given with respect to 20% and 70% of VDD, unless otherwise noted.
(2) Port C, and D timing is valid for active drive (CWOM, DWOM, and WOMS bits clear).
E clock
Ports
A, C, D, F, J, K
Ports
B, E, H
MCU read of port
tPDSU
tPDH
tPDSU
tPDH
Figure A-7 Port read timing diagram
A
E clock
PG[5:0]
PG[7,6]
MCU read of port
tPDSU
tPDH
tPDSU
tPDH
Figure A-8 Port G control timing
ELECTRICAL SPECIFICATIONS
MC68HC11KW1
A-8