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MC68HC11KW1 Datasheet, PDF (13/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit
LIST OF FIGURES
Figure
Number
TITLE
Page
Number
1-1 MC68HC11KW1 block diagram..............................................................................1-3
2-1 MC68HC11KW1 100-pin TQFP..............................................................................2-1
2-2 External reset circuitry............................................................................................2-2
2-3 Oscillator connections ............................................................................................2-3
2-4 RAM stand-by connections.....................................................................................2-5
3-1 Programming model ...............................................................................................3-1
3-2 Stacking operations ................................................................................................3-3
4-1 MC68HC11KW1 memory map ...............................................................................4-3
4-2 RAM and register overlap.......................................................................................4-14
4-3 Memory map example of memory expansion.........................................................4-25
4-4 Schematic example of memory expansion .............................................................4-26
4-5 Memory map example of memory expansion.........................................................4-27
4-6 Schematic example of memory expansion .............................................................4-28
5-1 Processing flow out of reset (1 of 2) .......................................................................5-17
5-2 Processing flow out of reset (2 of 2) .......................................................................5-18
5-3 Interrupt priority resolution (1 of 3) .........................................................................5-19
5-4 Interrupt priority resolution (2 of 3) .........................................................................5-20
5-5 Interrupt priority resolution (3 of 3) .........................................................................5-21
5-6 Interrupt source resolution within the SCI subsystem ............................................5-22
7-1 SCI baud rate generator circuit diagram.................................................................7-1
7-2 SCI block diagram ..................................................................................................7-3
7-3 Interrupt source resolution within SCI.....................................................................7-14
8-1 SPI block diagram...................................................................................................8-2
8-2 SPI transfer format..................................................................................................8-3
9-1 Timer clock divider chains ......................................................................................9-2
9-2 Timer 1 capture/compare block diagram ................................................................9-5
9-3 Timer 2 capture/compare block diagram ................................................................9-17
9-4 Timer 3 capture/compare block diagram ................................................................9-25
9-5 Pulse accumulator block diagram...........................................................................9-34
9-6 PWM timer block diagram.......................................................................................9-39
9-7 PWM duty cycle......................................................................................................9-44
A-1 Test methods ......................................................................................................... A-3
A-2 Timer inputs........................................................................................................... A-5
MC68HC11KW1
LIST OF FIGURES
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