MC68HC11KW1 Datasheet, PDF (40/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

3
Table 3-2 Instruction set (Page 2 of 6)
Mnemonic
BHS (rel)
BITA (opr)
Operation
Branch if higher or same
Bit(s) test A with memory
BITB (opr)
Bit(s) test B with memory
BLE (rel)
BLO (rel)
BLS (rel)
BLT (rel)
BMI (rel)
BNE (rel)
BPL(rel)
BRA (rel)
BRCLR(opr)
(msk)
(rel)
BRN (rel)
BRSET(opr)
(msk)
(rel)
BSET (opr)
(msk)
BSR (rel)
BVC (rel)
BVS (rel)
CBA
CLC
CLI
CLR (opr)
Branch if ≤ zero
Branch if lower
Branch if lower or same
Branch if < zero
Branch if minus
Branch if ≠ zero
Branch if plus
Branch always
Branch if bit(s) clear
Branch never
Branch if bit(s) set
Set bit(s)
Branch to subroutine
Branch if overflow clear
Branch if overflow set
Compare A with B
Clear carry bit
Clear interrupt mask
Clear memory byte
CLRA
CLRB
CLV
CMPA (opr)
Clear accumulator A
Clear accumulator B
Clear overflow flag
Compare A with memory
CMPB (opr)
Compare B with memory
COM (opr) Ones complement memory byte
COMA
COMB
Ones complement A
Ones complement B
Description
C=0?
A•M
B•M
Z + (N ⊕ V) = 1 ?
C=1?
C+Z=1?
N ⊕V = 1 ?
N=1?
Z=0?
N=0?
1=1?
M • mm = 0 ?
1=0?
M • mm = 0 ?
M + mm ⇒ M
see Figure 3-2
V=0?
V=1?
A–B
0⇒C
0⇒I
0⇒M
0⇒A
0⇒B
0⇒V
A–M
B–M
$FF – M ⇒ M
$FF – A ⇒ A
$FF – B ⇒ B
Addressing
mode
REL
A IMM
A DIR
A EXT
A IND, X
A IND,Y
B IMM
B DIR
B EXT
B IND, X
B IND,Y
REL
REL
REL
REL
REL
REL
REL
REL
DIR
IND, X
IND, Y
REL
DIR
IND, X
IND, Y
DIR
IND, X
IND, Y
REL
REL
REL
INH
INH
INH
DIR
IND, X
IND, Y
A INH
B INH
INH
A IMM
A DIR
A EXT
A IND, X
A IND,Y
B IMM
B DIR
B EXT
B IND, X
B IND,Y
EXT
IND, X
IND, Y
A INH
B INH
Opcode
24
85
95
B5
A5
18 A5
C5
D5
F5
E5
18 E5
2F
25
23
2D
2B
26
2A
20
13
1F
18 1F
21
12
1E
18 1E
14
1C
18 1C
8D
28
29
11
0C
0E
7F
6F
18 6F
4F
5F
0A
81
91
B1
A1
18 A1
C1
D1
F1
E1
18 E1
73
63
18 63
43
53
Instruction
Operand
rr
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
rr
rr
rr
rr
rr
rr
rr
rr
dd mm rr
ff mm rr
ff mm rr
rr
dd mm rr
ff mm rr
ff mm rr
dd mm
ff mm
ff mm
rr
rr
rr
—
—
—
hh ll
ff
ff
—
—
—
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
hh ll
ff
ff
—
—
Cycles
3
2
3
4
4
5
2
3
4
4
5
3
3
3
3
3
3
3
3
6
7
8
3
6
7
8
6
7
8
6
3
3
2
2
2
6
6
7
2
2
2
2
3
4
4
5
2
3
4
4
5
6
6
7
2
2
Condition codes
SXH I NZVC
————————
———— ∆ ∆ 0 —
———— ∆ ∆ 0 —
————————
————————
————————
————————
————————
————————
————————
————————
————————
————————
————————
———— ∆ ∆ 0 —
————————
————————
————————
———— ∆ ∆ ∆ ∆
——————— 0
——— 0 ————
———— 0 1 0 0
———— 0 1 0 0
———— 0 1 0 0
—————— 0 —
———— ∆ ∆ ∆ ∆
———— ∆ ∆ ∆ ∆
———— ∆ ∆ 0 1
———— ∆ ∆ 0 1
———— ∆ ∆ 0 1
3-10
CENTRAL PROCESSING UNIT
MC68HC11KW1