MC68HC11KW1 Datasheet, PDF (199/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Table 10-1 Channel assignments
CD CC CB CA
00 0 0
00 0 1
00 1 0
00 1 1
01 0 0
01 0 1
01 1 0
01 1 1
10 0 0
10 0 1
10 1 0
10 1 1
11 0 0
11 0 1
11 1 0
11 1 1
(1) Used for factory testing.
Channel signal
AN2 (on PE0)
AN3 (on PE1)
AN4 (on PE2)
AN5 (on PE3)
AN6 (on PE4)
AN7 (on PE5)
AN8 (on PE6)
AN9 (on PE7)
AN0 (on PG6)
AN1 (on PG7)
Reserved
Reserved
VRH⁽¹⁾
VRL⁽¹⁾
VRH/2⁽¹⁾
Test (reserved)⁽¹⁾
CONV8 = 0
CONV8 = 1
Result in register if Result in register if
MULT = 1 MULT = 0 MULT = 1 MULT = 0
ADR5 ADR5 – 8 ADR1 ADR1 – 8
ADR6 ADR5 – 8 ADR2 ADR1 – 8
ADR7 ADR5 – 8 ADR3 ADR1 – 8
ADR8 ADR5 – 8 ADR4 ADR1 – 8
ADR5 ADR5 – 8 ADR5 ADR1 – 8
ADR6 ADR5 – 8 ADR6 ADR1 – 8
ADR7 ADR5 – 8 ADR7 ADR1 – 8
ADR8 ADR5 – 8 ADR8 ADR1 – 8
ADR5 ADR5 – 8 ADR1 ADR1 – 8
ADR6 ADR5 – 8 ADR2 ADR1 – 8
ADR7 ADR5 – 8 ADR3 ADR1 – 8
ADR8 ADR5 – 8 ADR4 ADR1 – 8
ADR5 ADR5 – 8 ADR5 ADR1 – 8
ADR6 ADR5 – 8 ADR6 ADR1 – 8
ADR7 ADR5 – 8 ADR7 ADR1 – 8
ADR8 ADR5 – 8 ADR8 ADR1 – 8
10.3
Single channel operation
Single channel operation is selected by writing a zero to the MULT bit in the A/D control and status
register (ADCTL). This mode has four variations, which can be selected using the CONV8 and
SCAN bits in the ADCTL register. In the first two variations, the CONV8 bit is clear and the single
selected channel is converted four consecutive times. In the second two variations, the CONV8
bit is set and the single selected channel is converted eight consecutive times. The state of the
SCAN bit determines whether continuous or single scanning is selected. The channel is selected
by the CD – CA bits in the ADCTL register.
If channels eight and nine are selected, then the result registers previously used for two of the
other channels become overwritten with channel eight and nine results.
10
MC68HC11KW1
ANALOG-TO-DIGITAL CONVERTER
10-3