MC68HC11KW1 Datasheet, PDF (68/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

Table 4-9 CPU address and address expansion signals
Number of
banks
8K bytes
16K bytes
Window size
32K bytes
32K bytes (window based at $4000)
ADDR[12:0]
ADDR[13:0]
ADDR[14:0]
2
XA13
XA14
XA15
ADDR[13:0]
XA[15:14]
ADDR[12:0]
ADDR[13:0]
ADDR[14:0]
4
XA[14:13]
XA[15:14]
XA[16:15]
4
ADDR[12:0]
ADDR[13:0]
ADDR[14:0]
8
XA[15:13]
XA[16:14]
XA[17:15]
ADDR[13:0]
XA[16:14]
ADDR[13:0]
XA[17:14]
ADDR[12:0]
ADDR[13:0]
ADDR[14:0]
16
XA[16:13]
XA[17:14]
XA[18:15]
ADDR[13:0]
XA[18:14]
ADDR[12:0]
ADDR[13:0]
—
—
32
XA[17:13]
XA[18:14]
—
—
ADDR[12:0]
—
—
—
64
XA[18:13]
—
—
—
If neither bank uses a particular expansion address bit, the corresponding pin is available for
general-purpose I/O. The PGAR register selects which pins are used for I/O or memory expansion
address lines.
4.4.3 Memory expansion examples
Consider an example system in which an external memory is used and the user wishes to allocate
a single 8K byte window through which to access a total of 64K bytes of external memory. To
provide the 8K byte address range needed for the window, only CPU address lines ADDR[12:0]
need be used to provide 8K bytes (213) address locations. Expansion address lines XA[15:13]
replace CPU address lines ADDR[15:13] and provide an additional eight times (23) the number of
address locations provided by ADDR[12:0], (a total of 64K bytes of address space). ADDR[12:0]
provide the 8K byte window and XA[15:13] provide an additional eight bank-select signals that
determine which bank is present in the window. This is illustrated inFigure 4-3 and Figure 4-4.
Figure 4-3 shows a memory map and Figure 4-4 shows a schematic for a single 8K byte window
with 8 banks of external memory.
4-24
OPERATING MODES AND ON-CHIP MEMORY
MC68HC11KW1