MC68HC11KW1 Datasheet, PDF (120/238 Pages) Motorola, Inc – High-density complementary metal oxide semiconductor HCMOS) microcontroller unit

6.7
Port G
Port G is an 8-bit port, with both data and data direction registers. Pins [7, 6] are input-only, and
may be used as general purpose inputs, or as inputs to the A/D converter. Pins [5:0] are fully
bidirectional, and, in addition to their I/O capability, are shared with memory expansion functions,
as shown in the following table. The functions of pins [5:0] are controlled by bits in the port G
assignment register, PGAR.
Pin Alternative function
PG0
XA13

PG1
XA14

PG2
XA15
PG3
XA16
 See Section 4 for
 _{more information.}

PG4
XA17


6
PG5
XA18

PG6
AN0
 ^{See Section 10 for}
PG7
AN1
 more information.
Note:
The input timing characteristics of pins PG[7, 6] are different from the other port G pins.
Refer to Section A.5.1.
6.7.1 PORTG — Port G data register
Port G data (PORTG)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$007E PG7 PG6 PG5 PG4 PG3 PG2 PG1 PG0 undefined
This is a read/write register and is not affected by reset. The bits may be read and written at any
time, but, when a pin is allocated to its alternate function, a write to the corresponding register bit
has no effect on the pin state. Port G pins [5:0] have internal, software-selectable pull-up resistors
which are controlled by the PPAR register. See Section 6.11.1.
Note:
As port G shares two pins with the A/D converter, a read of this register may affect any
conversion currently in progress, if it coincides with the sample portion of the
conversion cycle. Hence, normally port G should not be read during the sample portion
of any conversion.
PARALLEL INPUT/OUTPUT
MC68HC11KW1
6-8